Column
• input resistor non-idealities like resistance drift and non-linear resistance
• the effect of charge injection and clock jitter on the operating switches that cause small deviations from the ideal output voltage ramp behaviour
Among other objectives the True8Digit project is addressing these non- idealities, that are crucial to achieve IADC performance that is beyond the state of the art. In the first half of the project, we
have identified a composite operational amplifier (COPA) with extremely high gain (>220 dB at low frequencies) and large gain-bandwidth product, with a stable operation in an integrator configuration. First physical realisations are being built to confirm simulated performance, shown on Figure 2. Further, the crucial measurement
challenge of determining capacitor and resistor nonlinearities down to -170 dBc, has been overcome using a special purpose active bridge. Figure 3 shows the 2nd and 3rd harmonic distortion measured on the best available metal-foil resistor in the frequency range from 5 Hz to 20 kHz. Apart from that, we have characterised
capacitor dielectric absorption, resistors’ tracking stability and switch charge injection with high accuracy. By carefully and comprehensively
120 180 240
60 0
10
1k 100k 10M Frequency (Hz)
Resistor non-linearity
modelling an IADC it is possible to examine the effect of the non-ideal behaviour due to its component parts as well as to investigate the effectiveness of possible mitigations. For that, all conceivable influences must be considered when constructing the IADC model. The non-ideal behaviour of the actual components used in the ADC can be parameterised based on their precise measurement. As there is no single simulation platform that can include all these detailed, specific models, a custom simulation software has been written in MATLAB, with a potential to verify its behaviour in Simulink and further include COPA detailed circuit models in LTSpice. With these results and tools, we can demonstrate the viability of surpassing the current IADC performance level and thus underpinning a follow-on project on actual development of the state-of-the-art digitiser.
−170 −160 −150 −140
2nd HD 3rd HD
Integrating COPA gain
1 10 100
1k 10k 100k Frequency (Hz)
The project (22TPR02 True8DIGIT) has received funding from the European Partnership on Metrology, co-financed from the European Union’s Horizon Europe Research and Innovation Programme and by the Participating States. The UK participant in Horizon Europe Project 22RPT02 True8DIGIT is supported by UKRI grant number 10,084,012 (Signal Conversion Ltd).
www.electronicsworld.co.uk February 2025 45
HD (dBc)
Gain (dB)
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