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Feature: Programmable devices


Adaptive platforms are enabling the next


computing era By Ivo Bolsens, Chief Technology Officer, Xilinx W


e’re at an inflection point in the semiconductor industry, with intelligent,


connected devices becoming pervasive in cars, homes, offices, factories, cities, and so on. The cost for this pervasive Artificial Intelligence (AI) is an exponential increase in the data- processing requirements placed on the semiconductors that power these systems.


Industry challenges Much of what has driven general- purpose processors and computing in general for the last 50 years has run out of fuel. Dennard transistor scaling (when transistors shrink, power density remains constant for a given area of silicon) stopped working in the early 2000s, about the same time RISC architectural improvements were saturating. Ten we hit single-core performance and the power/thermal walls.


26 February 2021 www.electronicsworld.co.uk Multi-core processors with multi-


threading helped deliver more throughput performance, but that started earlier last decade due to Amdahl’s Law, which holds that latency can be taken out of a performance task through parallel computing. At the same time, Moore’s Law – which states that the number of transistors in a dense integrated circuit (IC) doubles about every two years – began to slow. Here, we are using the common concept of Moore’s Law, meaning every two years a processor moves to a new process node, yielding higher performance, lower power and halved area. Today, Moore’s Law is no longer delivering improvements in performance, power and area. You meet one, or maybe two of the three, depending on the application and how hard you work at it. It’s also taking more than two years to get to the next smaller process node. As advances in semiconductor


manufacturing technology have slowed, we’ve needed something new to keep advancing.


Xilinx Vitis chip structure


Architectural innovation The decline of the traditional industry drivers is encouraging many new innovations across the semiconductor industry. An increasingly important one is the use of Domain Specific Architectures (DSAs), which are optimised for a particular domain; AI inference, for example. Such an architecture typically contains logic, memory and interconnect, pre-configured to optimally implement the type of processing that AI inference requires – typically MAC-heavy math operations. The architecture will be flexible to allow different types of neural network layers to be implemented efficiently in hardware. In contrast, general-purpose processors


can execute a broad range of applications, but they generally don’t deliver the best performance or best power efficiency, particularly for applications that can be parallelised, like image processing. The workloads that computing needs today and in the future are increasingly parallel and frequently streaming or ‘live’ and, hence, need to be processed with low latency.


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