Focus: FeRAM


of the ferroelectric capacitor within each bitcell, enlarging the memory window without sacrificing array density.


Solving the wake-up problem Traditional FeRAM devices often exhibit a phenomenon known as “wake-up”, where electrical characteristics shift unpredictably during initial cycling, degrading stability and reliability. While the precise mechanism is still under study, the suppression of wake-up is likely related to the confinement of materials within the narrow, high aspect ratio vias, which locally modifies the strain state in the ferroelectric thin film. This stabilises the crystal phase responsible for memory function from the outset. CEA-Leti’s high aspect ratio 3D capacitors exhibit wakeup-


free behaviour consistent with an approximately 80% orthorhombic phase fraction in the HZO film, as confirmed by precession electron diffraction. Now, CEA-Leti plans to integrate the demonstrated high


aspect ratio ferroelectric capacitors into dense FeRAM arrays on a 22nm fully-depleted silicon-on-insulator (FDSOI) platform, aiming to achieve the highest-performance embedded FeRAM to date.


Figure 2: 3D FeCap fi eld with 60nm diameter and 1µm deep FeCaps, with a TiN/HZO/TiN/W ferroelectric stack


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