Supplement: Aerospace, Military and Defence
Figure 1 - Flash and SONOS-based FPGAs are immune to SEUs in the configuration memory.
Instead, the FPGAs must be programmed upon power-up. SRAM-based technology consumes more power and is very sensitive to radiation. For instance, the configuration cell of the FPGA, the thing that makes it programmable, is not single event upset immune. Designers have to take into careful consideration the upset rate of the CRAM to verify whether an SRAM FPGA can meet the reliability requirements of the mission.
Flash-based FPGAs
Re-programmable Flash-based FPGAs use Flash as a primary resource for configuration memory. Flash technology is immune to SEU, eliminating the threat of radiation-induced upsets in the configuration memory of the FPGA. RTG4 Flash-based FPGAs use up to 50 per cent less power compared to SRAM-based FPGAs. Flash technology simplifies the design in multiple ways, as there is no need for external memory, redundancy or continuous configuration monitoring, also called scrubbing. It also eliminates the need for a heat sink, reducing the size and weight of the designs while reducing power
consumption, which can be especially important if an electronic module is powered with solar panels.
SONOS-based FPGAs
An example is the Microchip RT PolarFire FPGA, which offers radiation performance with characterized radiation data, low power, SEU configuration immunity and high-reliability components. RT PolarFire FPGAs are QML-Q qualified with a path to QML-V qualification. These FPGAs are developed on a silicon-oxide-nitride- oxide-silicon (SONOS) non-volatile (NV) technology on a 28 nm technology node. The performance of 28 nm and earlier 65 nm technologies has been compared by measuring the propagation delay of an inverter. These tests show that 28 nm SONOS technology offers 2.5 times higher performance than 65 nm Flash-technology. These SONOS-Based FPGAs also have outstanding radiation performance and SEU immunity, while offering a low- power solution. With a path to QML-V qualification, SONOS-based FPGAs are ideal in applications that require high- speed signal processing. And, again, are up
to 50 per cent lower power than similar SRAM FPGAs.
Figure 1 shows how Flash and SONOS- based FPGAs are architected to provide SEU immunity.
Antifuse-based FPGAs
Antifuse-based FPGAs are programmed once, which limits a key re-
programmability advantage as compared to Flash and SONOS-based FPGAs. Antifuses do not conduct current initially but are burned to conduct current (the antifuse behaviour is the opposite to the behaviour of a fuse). Antifuse technology is very robust against radiation effects.
How RT FPGAs are developed RT FPGAs are developed on process technologies that have excellent radiation TID performance. They can be RHBD, with flip-flops that have built-in TMR at the circuit level or they can be Radiation Tolerant with TMR deployed in software, also known as soft TMR, to specific logic that needs the additional reliability of a TMR topology. RT FPGAs go through a stringent qualification. For devices to be qualified to the highest
standard, they must adhere to the MIL- PRF-38535 standard that was released by the Department of Defense, which created consistent qualification, testing and reliability standards for military and space ICs. MIL- PRF-38535 defines requirements for IC manufacturers if they wish to be listed on the Qualified Manufacturers List (QML) by the Defense Logistics Agency (DLA). Once QML certification is achieved a Standard Military Drawing (SMD) part number is assigned. SMD part numbers assure designers of space systems are getting the high-quality device they need to survive in the harshness of space. Just as important as QML qualification is characterizing the actual SEE performance under different radiation sources. The resultant radiation test reports are essential to system designers and enable them to design their systems for the specific radiation environments that satellites, lander or rover will experience.
Some process technologies may have TID performance that varies across wafers from lot to lot. As a result, TID performance testing must be performed in production, on a wafer lot basis, to guarantee a device will meet its target TID level specification (25 krad, 100 krad, 300 krad).
RT FPGAs’ impact on spacecraft design
RT FPGAs from Microchip provide two critical advantages to simplifying electronics designed for the harshness of space. SEU immune configuration cells and up to 50 per cent lower power. The RT PolarFire FPGA recently achieved QML-Q certification. RT PolarFire offers more DSP, RAM, and transceiver bandwidth with 6X the resources over our previous RTG4 FPGA, enabling space system designers’ high quality, low power products to take us to the final frontier.
www.microchip.com
www.cieonline.co.uk Components in Electronics March 2024 39
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