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PRODUCTS EMBEDDED NEW RASPBERRY PI 400 DESKTOP COMPUTER T


The new Raspberry Pi 400 desktop computer, available in


ready-to-use kit is an ideal desktop computer for use in the home or education. It can also be purchased on its own for use in industrial and commercial applications including point-of- sale terminals and thin clients. The kit integrates a keyboard


and electronic components into a fully-enclosed compact unit, and offers a clock speed of 1.8GHz, 20% higher than Raspberry Pi. The kitted variants comprise a Raspberry Pi 400, pre-programmed SD card, power supply, mouse, Beginner’s Guide and micro HDMI cable; all that is required to start using Raspberry Pi 400 is a television monitor. Other feature, include a 28nm


Broadcom BCM2711 quad-core ARM Cortex-A72 64-bit processor clocked at 1.8GHz. 4GB LPDDR4- 3200 RAM, and a micro SD card slot for operating system, application and data storage. Dual-band 802.11ac wireless


networking delivers real-world data


rates of more than 100Mbps, Gigabit Ethernet, and Bluetooth 5.1. The two SuperSpeed USB 3.0 ports can be used to connect a wide range of peripherals. Two micro- HDMI ports, support up to 4Kp60. Customers can easily integrate


Raspberry Pi 400 into embedded designs using the horizontal 40- Pin GPIO header. Raspberry Pi 400 is available in


six keyboard languages for the UK, Germany, France, Italy, Spain and North America. Lee Turner, Global Head of


Semiconductors and SBC at Farnell, said: “ Raspberry Pi 400 provides all the functionality of a desktop computer in a small footprint.” sg.element14.com


Aldec, Inc. has introduced a HES-DVM simulation acceleration flow for Microchip’s PolarFire, SmartFusion2 and RTSX/RTAX FPGA designs using Aldec’s HES-MPF500-M2S150 prototyping board. Simulation acceleration techniques


ANTENOVA RELEASES HIGH PERFORMING 5G ANTENNA


A high performing 5G SMD 5G antenna has been developed by Antenova. The new Lepida SR4L054, is a wideband antenna in SMD form, designed to achieve high efficiency and performance right across the spectrum from 600MHz to 3800MHz. Lepida operates right across the cellular bands B71 (617-698 MHz), LTE 700, GSM850, GSM900, DCS1800, PCS1900, WCDMA2100, B40 (2300 – 2400 MHz), B7 (2500-2690MHz), and B78 (3300-


3800MHz). The antenna is linear polarised and has been designed to ensure excellent coplanarity. Antenova has built Lepida for the more demanding applications in 5G, 4G and LTE where antenna


performance and reliability make a difference. In particular, it is designed for wireless devices in the automotive sector, aerospace and UAV, smart metering applications, remote control and 5G routers. This antenna is the latest addition to Antenova’s range, which offers a wide choice of embedded antennas


covering 5G, 4G/LTE, 3G, 2G, NB-IoT, Wi-Fi, Bluetooth and GNSS/GPS frequencies. Antenova’s lamiiANT antennas are made to SMD designs using laminated FR4 materials, and the flexiiANT antennas are flexible FPC designs with a cable and connector offering an alternative choice for some small devices. The company recently introduced its Rabo group of terminal antennas which also operate on 5G, as well as the 4G, 3G and 2G cellular bands. www.antenova.com


have been around for about two decades, but most products are based on FPGAs from one or two leading FPGA vendors. Usually, it does not matter which FPGA family is used on the simulation acceleration board if the design is coded using synthesisable RTL. However, growing design complexity,


along with shrinking design cycles and shorter time to market, are increasingly taking engineers down the path of re- usable IP blocks from the FPGA vendor, instead of developing RTL code. The drawback is that the designs become dependent on the given FPGA technology, and the re-usable IP blocks usually require far more computational power to simulate than pure RTL code. Aldec’s HES-DVM overcomes these


challenges and removes a key verification bottleneck. With the latest release of this EDA tool, users of PolarFire, RTAX/RTSX and SmartFusion2 devices wishing to take advantage of Microchip IPs can accelerate their RTL simulations. www.aldec.com


HARDWARE ASSISTED RTL SIMULATION ACCELERATION


ALDEC’S TYSOM FAMILY NOW SUPPORTS XILINX PYNQ (PYTHON PRODUCTIVITY FOR ZYNQ)


Productivity for Zynq from Xilinx, Inc. to its TySOM family of Xilinx Zynq SoC based boards and its TySOM Embedded Development Kit. The Xilinx PYNQ framework (pronounced “pink”) is the popular open


source platform that is enabling software engineers to develop applications for Xilinx SoC and MPSoC devices with reduced reliance on support from hardware engineers. The popularity and ease of use of the open-source high-level


programing language Python, at the heart of PYNQ, is making the development of Zynq SoC- and MPSoC-based applications significantly easier for both hardware and software engineers alike. “The ability to use the high-productivity scripting language Python is


one of the main enablers for making Xilinx devices more accessible to designers without a hardware background,” said Zibi Zalewski, general manager of Aldec’s Hardware Division. “With the recent PYNQ image developed for TySOM, SoC designers can


Aldec, Inc., a pioneer in mixed HDL language simulation and hardware- assisted verification for FPGA and ASIC designs, has added PYNQ Python


34


now develop their PYNQ-based applications using our TySOM embedded development boards.” www.aldec.com


NOVEMBER 2020 | ELECTRONICS / ELECTRONICS


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