POWER DEVICES
manufacturers specifying voltages down to −10V.
Desaturation protection (DESAT) DESAT protection is a type of over−current detection that originated in circuits that drive IGBTs. During the on−time, if an IGBT could no longer be held in saturation (“desaturation”), the collector−emitter voltage rises while the full collector current fl ows. Clearly, this has a negative impact on effi ciency and, in a worst- case scenario, could lead to the catastrophic failure of the IGBT. The so-called “DESAT” function monitors the collector−emitter voltage of the IGBT and detects when a potentially destructive condition occurs. Although the fault mechanism in a SiC MOSFET is somewhat different, it can suffer a similar fate where VDS can rise while a maximum ID is fl owing. This undesirable condition can arise if the maximum VGS during turn−on is too low, the gate drive turn−on edge is too slow, or a short circuit or overload condition exists. The RDS can increase while the full ID is present, causing an unexpected rise in VDS. When a SiC MOSFET undergoes a desaturation event, VDS responds very rapidly, while the maximum drain current continues fl owing through an increasing on−resistance. When, the VDS reaches a predetermined threshold, the protection can be activate. Particular attention should be taken to avoid delay in sensing VDS that can mask the phenomena. DESAT is, therefore, an important and commentary protection of the gate drive circuitry.
Dynamic switching
The turn−on and turn−off switching states for a SiC MOSFET have four distinct phases. The dynamic switching waveforms shown are representative of ideal operating conditions. Still, in practice, package parasitic such as lead and bond wire inductance, parasitic capacitances, and PCB layout can profoundly
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Figure 5: NCP51705 SiC gate driver block diagram
affect real waveforms. Proper component selection, best PCB layout practices, and an emphasis on providing a well−designed gate− drive circuit are each essential for optimising the performance of SiC MOSFETs used in switching power applications.
Gate drivers wish-list
To compensate for low device gain while achieving effi cient, high−speed switching, the following are critical requirements for a SiC gate drive circuit: •
Gate driver solution
The NCP51705 by onsemi is a SiC gate driver IC that offers considerable design fl exibility and integration and is compatible with almost any SiC MOSFET. The NCP51705 includes many functions common to general-purpose gate driver ICs, including: • •
VDD positive supply voltage up to 28V
High peak output current of 6A source and 10A sink
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Most SiC MOSFETs perform best when driven between −5V > VGS > 20V. The gate drive circuit should be able to withstand VDD = 25V and VEE = −10V to cover the broadest range of available devices
• •
VGS must have fast rise and fall edges (in the order of a few ns)
The ability to source and sink high peak gate current (several amps) across the entire Miller plateau region
Sink current capability is driven by the need to provide a very low impedance hold−down or “clamp” as the VGS falls below the Miller plateau. The sink current rating should exceed what would be required by merely having to discharge the input capacitance of a SiC MOSFET. A minimum peak sink current rating on the order of 10A should be appropriate to cover high-performance, half−bridge power topologies
• • •
VDD under−voltage lockout (UVLO) level that is matched to the requirement that VGS > ~16V before switching begins
VEE UVLO monitoring capability to assure the negative voltage rail is within an acceptable range
A desaturation function capable of detection, fault reporting, and protection for reliable long-term operation of the SiC MOSFET
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Figure 4: 4-Phase turn-On sequence for a SiC MOSFET
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Low parasitic inductance for high−speed switching
Small driver package, locatable as close as possible to the SiC MOSFET
Onsemi
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Internal 5V reference made accessible for biasing 5V, low−power loads up to 20mA (digital isolator, optocoupler, microcontroller, etc.)
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• • •
Separate signal and power ground connections
Separate source and sink output pins Internal thermal shutdown protection
Separate non−inverting and inverting TTL, PWM inputs
However, this IC includes several features that enable the design of a reliable SiC MOSFET gate driver circuit using minimal external components. These include: • •
DESAT
Charge Pump (to set the negative voltage rail)
• •
• Programmable UVLO
Digital Synchronisation and fault reporting
A 24 pin, 4mm × 4mm, thermally enhanced MLP package for convenient board-level integration
The low gain of SiC MOSFETs creates a problem for designers when selecting an appropriate gate driver IC. General-purpose low−side gate drivers lack the functionality to drive a SiC MOSFET effi ciently and reliably. The NCP51705 includes a range of features that offers designers a simple, high−performance, high−speed solution to drive SiC MOSFETs with effi cient and reliable operation.
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