FEATURE EMBEDDED TECHNOLOGY
Goodbye CMOS; hello Bizen? A new way of designing circuits
Circuitry and the processes by which it is created have been cemented for years: until now. David Summerland, CEO of Search for the Next (SFN), hopes to rectify that by destabilising the familiar
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magine being able to order a complex integrated circuit and have it on your desk in two weeks, rather than the 15-25 weeks it normally takes. And what if this was being produced, not in an expensive fab, but in a UK foundry more geared to making discrete components. That is SFN’s vision - an alternative to MOS and bipolar structures - which has been realised with a new transistor design and patent-pending wafer process technology that uses Zener quantum tunnel mechanics. Called Bizen (a contraction of bipolar and Zener), SFN hope and intend for it to disrupt the semiconductor industry, paving the way for devices with lower dynamic power, higher speed and higher gate density, impacting the supply chain by halving the number of process layers, using one third of the material and requiring only ten per cent of the lead time required by conventional devices. Deep-diving into the technology, the Bizen transistor’s input is achieved via an isolated quantum tunnel connection, simply termed a ‘tunnel’. The output terminals are identical in doping and structure, so unlike a BJT where they are named ‘collector ‘and ‘emitter’, SFN simply refers to them as ‘Anode 1’ and ‘Anode 2’ (see fig. 1). The advantage of these regions being the same is that the transistor has identical forward and reverse characteristics, allowing for AC
According to Semfab’s CEO, Allan James, the new devices have been manufactured on a one micron process to the TRL 4/5 standard, just below full production quality, and the initial results are close to the theoretical. The next stage - currently ongoing - is to use a 0.1 micon process to check how devices will scale with the process. SFN is also working on a Cadence PDK, which will allow designs made for CMOS manufacturing lines to be translated to the new Bizen process. James had this to say: “I was initially
Fig 1: The structure of Bizen
signals and push/pull circuits. Bizen subsequently uses quantum tunnel mechanics in the wafer process design to create a resistor-free, normally-on transistor by overlapping the valance and conduction bands. The result is that Bizen technology lets designers create reduced-device-count circuits in smaller silicon areas, with fewer layers and without the high ohmic resistor. For example, an XOR gate in CMOS, TTL and NMOS is typically eight transistors. In Bizen, it can be done in two, without resistors and as a metal-free layout using four layers; these four layers inherently provide two tracking layers and zero space vias. When this is expanded into a more complex cell, such as the D-type master-slave flip flop with preset, clear and enable, the transistor count which is normally 28-35 in NMOS, bipolar and CMOS designs is reduced to just eight layers with a two to three times reduction in silicon area. Bizen transistors can be manufactured in standard fabs with no specialised processes, bringing a new lease of life to older fabs. For the past two years, SFN has being working with Scottish semiconductor fab, Semfab, at their base in Fife, to refine the manufacture of the new process and to compare actual results with theoretical simulations.
18 DECEMBER/JANUARY 2020 | ELECTRONICS
CEO David Summerland, outside Search for the Next’s headquarters
quite sceptical, but having lived with the concept and seen the early-stage results, it does indeed tick many of the boxes needed to disrupt the industry. It’s not so much a question that CMOS is flawed, although CMOS is prone to latch-up and ESD; CMOS is low power, has passed the test of time and is generally reliable. However, it is complex, and when integrated with power, even more so. Complexity means longer lead times and higher cost. Therefore, if Bizen had been discovered back in the late 60’s, when the transition from bipolar to MOS and CMOS took place in order to cost-effectively integrate logic functions, it is possible that the industry may have developed strongly in the direction we are now proposing. It is not too late however, and if it is adopted by the industry, given the reduction in die area for a given technology, the important prize would be the ability to wind back the Moores’ Law clock by ten years or more and bring many wafer fabs back into the production mainstream. There is still a way to go before Bizen becomes a commercial reality and we are still learning. However, Semefab and SFN are working to make it the next big success.”
Search for the Next
www.searchforthenext.com
/ ELECTRONICS
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