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FEATURE EMBEDDED TECHNOLOGY A STREAMLINED APPROACH Steve Kaufer, Mentor Graphics Corporation explores running all simulations from a single environment


igh-speed PCBs vary greatly in size, layer count, routing density, signalling speed, types of silicon used, power-delivery challenges, and other factors. Some designers resort to multiple analysis tools, for example trying a batch-mode SI simulator for slower signals and a 3D-EM solver for very-high- speed SERDES channels. But even a set of tools offered by a single EDA vendor typically require changing applications and user interfaces for different types of analysis (e.g., signal versus power versus 3D). In contrast, HyperLynx now offers all types


H


of analysis in a single application, with one GUI. A user can literally be simulating a critical SERDES channel one minute, and by selecting a single new menu item, switch to analysis of a large power net’s decoupling. Many designers perform analysis using a


variety of tools, often with disparate user interfaces, and not all share data in a friendly way. Now, HyperLynx from Mentor Graphics has merged an entire set of simulation tools into a single application, and of course, with one unified GUI. Switching between, say, a power integrity analysis to looking at a SERDES channel is just a click of a button. But such convenience is valuable only if underlying simulation engines and algorithms are strong. Mentor has invested heavily in HyperLynx analysis technology in recent years. Much research and development has gone into interconnect modelling: HyperLynx now combines a super-fast computational geometry engine and advanced materials modelling (for wideband dielectrics, copper roughness, etc.) to produce highly accurate simulation netlists. Crosstalk can be modelled in great detail; aggressor nets can be identified quickly in even the largest layout databases, based on geometric or electrical thresholds. For higher signalling speeds, the HyperLynx simulators have been upgraded to efficiently handle S- parameter models of virtually any size, and S- parameter extractions are now handled by a unique, dedicated engine. The frequencies at which SERDES circuitry operates can generate a substantial amount of unwanted electromagnetic radiation. The result of this could be failing EMC requirements. But 3D EM simulation can be complex to understand and set up. To simplify, HyperLynx deeply integrates the 3D engine so that the user never has to learn the intricacies of a full-wave-solver environment. Structure geometries are passed, EM ports are formed, simulations are run, and S-parameter results are returned and incorporated into


24 JULY-AUGUST 2016 | ELECTRONICS


time-domain simulations, automatically. Recently, PCB power-delivery systems have


come under stress. What formerly were “power planes” are now collections of highly compromised power “areas,” (Figure 1) whose integrity must be simulated. HyperLynx has added multiple engines — two 2.5D solvers, the industry’s fastest DC/IR-drop simulator, and a fast quasi-static 3D solver — to enable a full set of power-integrity features, all of which are available side-by-side in the same application as HyperLynx signal-integrity capabilities. This version adds a second, more-advanced 2.5D solver, capable of not only pure power but also mixed signal-and- power modelling, which can be used to add accuracy to SI simulations when simultaneous-switching-noise (SSN) complications are suspected.


ANALYSIS FROM BEGINNING TO END Simulating every detail of signal routing and power delivery on a PCB is powerful, but possibly overwhelming. The HyperLynx DDRx batch-simulation wizard


pioneered easy setup, automated whole-bus simulation, and consolidated results reporting for memory interfaces. Now, HyperLynx extends this popular capability to DDR4 and LPDDR4 interfaces. HTML-based reporting creates design documentation and allows internal Web-based “publication” of results.


Figure 2:


The Channel Operating Margin (COM) tool allows checking of the “goodness” of links based on a specific, complex set of


simulation steps that in the end produces a single pass/fail number per-channel


Figure 1:


PCB power-delivery systems simulation


A new analysis tool has become popular for SERDES busses. This tool, called Channel Operating Margin (COM) allows checking the “goodness” of links based on a specific, complex set of simulation steps that in the end produces a single pass/fail number per- channel (Figure 2). Another way to streamline the daunting task of simulating all signal and power effects on a large PCB is to proactively identify portions of a design that most need detailed analysis, and to reduce the time required for simulation by promoting aggressive re-use of expensive-to-create models (like 3D-based S parameters). This is accomplished by integrating the powerful HyperLynx DRC engine directly inside the HyperLynx SI/PI environment. Now the super-fast DRC engine (capable of scanning board-wide for routing and other geometric anomalies in seconds) can provide “simulation triage,” by accurately finding layout structures that violate design intent or best practice. For example, HyperLynx SI/PI deploys this engine to automatically find all differential via pairs that do not conform to pre-designed known-good “patterns”; and to group all such vias into sets for which only one 3D- EM S-parameter extraction (automatically run) is needed per set, saving potentially many hours of simulation time per board. Continuing with ease-of-use and fast


interactive analysis, the new release puts dual emphasis on a very different type of usage: in a pure batch-mode environment, driven by scripts, run on entire layouts at least once-per-day, with little/no user intervention and a completely suppressed GUI. Much investment has gone into robusting HyperLynx for such use: the ability to efficiently handle very large layouts (including extra-deep stackups, huge net counts, and entire multi-board systems); multi-processor and other simulation-engine performance enhancements; and caching and re-use of extracted models. The latest version of HyperLynx offers two


scripting interfaces, a simplified one requiring no programming expertise and a richer, language-based environment; the latter makes customised access to the powerful HyperLynx engines possible.


Mentor Graphics Corporation www.mentor.com/uk E: sales_info@mentor.com


/ ELECTRONICS


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