Data acquisition
Figure 2. The JESD204B/JESD204C data path layers.
transport layer RTL generator are script-based tools that generate the transport layer based on an input list of desired JESD204B/JESD204C modes. They support all possible modes offered by high speed data converter products. For designs that only need support for a single mode set at compile time, the ADI ADC transport peripheral and ADI DAC transport peripheral can be used.
4. Application Layer
The application layer enables any pre-processing or post-processing of data to facilitate a specific feature set or a more efficient way to handle data in an end application.
In most cases, the application layer code is specific to a customer application. However, ADI has FPGA IP to support certain advanced use cases, which can be made available to customers on request. The aforementioned FPGA IPs are available as part of FPGA reference designs or as standalone IPs modules that can be used in custom designs that use ADI high speed data converter products. These reference designs are supported on multiple custom ADI FPGA platforms and commercial off- the-shelf (COTS) FPGA platforms. The ability to evaluate features and performance of high speed ADC, DAC, and MxFE family of products is instrumental in a customer’s journey towards product integration. High speed data converter evaluation boards interface with an FPGA-based data controller board, allowing users to capture samples from an ADC or transmit samples to the DAC. For ADI high speed data converter products, the JESD204B or JESD204C data interface and other I/O control interfaces are routed over a FMC or a FMC+ connector, leveraging the VITA57.4 high pin count connector standard. The
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hardware components are supported by FPGA and software solution options targeted to ease customer adoption.
ADI FPGA PLATFORMS
ADI’s FPGA evaluation platforms (ADS7-V2 EBZ, ADS8-V1 EBZ, ADS8-V3 EBZ, and ADS9-V2 EBZ are the four active versions with an ADS10-V1 EBZ in the pipeline) are well-suited for product evaluation and building a proof of concept design based on the end customer application. Figure 3 shows an ADS9V2-EBZ FPGA evaluation board used to interface with the MxFE family of products. It features an AMD Xilinx Kintex UltraScale+ FPGA that supports twenty 28Gbps transceivers connected over one FMC+ connector; HMC DRAM modules to capture the high data throughput; a power distribution network, and a scalable clocking architecture that enables deterministic link latency support. Each data converter product page lists the recommended FPGA evaluation boards for the product and is supported by a FPGA binary file and its corresponding software suite. The FPGA source code includes highly configurable RTL with multimode support for the JESD204B/JESD204C data path. It also provides RTL for memory controllers, embedded C drivers, and state machines to control the establishment of the link and the flow of data. The FPGA source code for high speed data converter products with JESD204B/ JESD204C interfaces can be requested directly from ADI.
COTS FPGA PLATFORMS There is also the option to use an off-the-shelf AMD Xilinx or Intel FPGA board that supports the desired line rate and memory bandwidth requirements and has adequate logic and I/O resources. ADI provides reference designs for a subset of these compatible boards suitable for
product evaluations and building proof of concept designs. These designs include ADI JESD204B/JESD204C IP, drivers, and a software stack that enables the movement of data to and from these boards over Ethernet. The FPGA reference code and software infrastructure, including drivers and detailed documentation can be downloaded as example projects on the Analog Devices Wiki.
ADI JESD204B/JESD204C TOOLS In addition to the FPGA IP offerings and evaluation boards, ADI has a variety of development tools to expedite implementation of the JESD204B/JESD204C interface.
IBIS-AMI Models The IBIS-AMI models can be used to model the high speed serialiser and deserialiser links that include transmitter and receiver equalisation algorithms. ADI’s high speed converter product pages list IBIS-AMI models, based on the SerDes PHY IP used.
JESD Mode Selector Tool
The JESD204B/JESD204C Mode Selector Tool is a command line-based tool that can narrow down the number of modes required to support a specific end application use case. The tool guides the user through a use case description flow chart and identifies the relevant transmit and receive modes based on system design.
JESD204 Frame Mapping Table Generator The JESD204x Frame Mapping Table Generator enables a better understanding of the way data converter samples are arranged, by allowing the user to input any valid combination of the JESD204B/JESD204C parameters (L, M, F, S, NP)
March 2024 Instrumentation Monthly
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