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TECHNOLOGY INTEGRATION


the integration of this is challenging.


One way to unite a laser with a silicon chip is to bond the two together. This is quite easy to do, but it does not guarantee great performance, due to the silicon-on-insulator wafers used in the process. The insulating layer sandwiched between the silicon is a low-thermal-conductivity dielectric that hampers the dissipation of heat generated by the laser, leading to device heating and reduced performance. What’s more, bonding chips together can compromise yield. To bring the laser onto the silicon chip, either III-V dies or a wafer must be selectively bonded to a larger silicon substrate. This can lead to unacceptable variations in the thickness of the intermediate bonding layer across the silicon. Although chip-to-chip bonding can address this, it is expensive, and stringent alignment requirements can impact yield.


Monolithic integration


A far better way to unite a microprocessor chip with a III-V laser is via monolithic integration. This is the approach that has been adopted by several groups across the world, including ours at KTH in Sweden, where we have developed a novel approach for creating defect-free layers of InP.


The biggest challenge with all epitaxial approaches to integration is to combat the large differences in lattice and thermal expansion coefficient. This can lead to III-V materials that are riddled with defects, which can act as charge trapping sites that reduce carrier lifetimes and ultimately kill the device. To prevent this from happening, we employ a method known as epitaxial lateral overgrowth (ELOG), which involves selective growth of a defect-free layer of InP in openings defined in a thin film of dielectric deposited on silicon (see Figure 1).


With this approach, defects generated at the interface between the III-V and silicon are filtered by the dielectric film, enabling the deposition of a defect-free InP layer that can act as a virtual substrate for selective growth of InGaAsP-based multi-quantum wells. Armed with this technology, the door has been opened to the creation of truly monolithic integrated photonic circuits on silicon, which up until now have only been possible with bonding approaches.


Creation of the high-quality InP that is essential for adding a laser is based on selective-area growth via HVPE, employing near-equilibrium conditions. The first step involves deposition of a thin InP layer on silicon to create a seeded substrate. After this, a film of the dielectric SiO2


is deposited and subsequently


patterned using lithographic techniques to create a series of SiO2


stripes across the wafer. This leaves us with a region of exposed InP that is riddled with defects. On further growth


Copyright Compound Semiconductor Issue VI 2014 www.compoundsemiconductor.net 61


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