IC packaging technology retrospective—part 3
Joe Fjelstad
IC packaging technology
retrospective—part 3
Part 2 of this retrospective, seen in last SMT use, there were other important IC pin count ICs in the 1980s and is still the
month’s issue of Global SMT and Packag- package solutions that were conceived in most common technology for interconnect-
ing, took a bit of a detour from the topic the early days of the integrated circuit in- ing display driver chips.
to explore the reasoning and the impact of dustry. These did not get much immediate When surface mount technology began
the ‘80% Rule’ (which was adopted for the attention but were later embraced for many to take off in earnest in the late 1970s,
road mapping of early surface mount pack- applications and still are employed in some many of the IC packages were simply adapt-
age I/O pin outs) to illustrate how that rule specific product areas. Arguably, the most ed from those used for military products
had an unintended but deleterious effect important of these solutions is commonly and were typically made using ceramic ma-
on design as the industry transitioned to referred to as TAB, which is an acronym terials. Ceramic packaging has a number
more dense area array packaging. The topic for ‘tape automated bonding.’ of advantages, including excellent thermal
of area array packaging will be covered in As often happens with many individu- resistance and thermal conductivity, herme-
more detail in a later part of this series; als seeking solutions to a common prob- ticity, and very good electrical properties,
however, at this time we will pick up again lem, near simultaneous invention is not especially in terms of loss tangent. It was a
on the progress of IC packaging technol- infrequent, and it was very much the case favorite of the military electronics industry
ogy evolution and early surface mount for TAB. Two inventors of note in the area and the substrate material of choice for
packages. were Frances Hugel, a pioneering woman the hybrid circuit industry. In fact, much
As noted in Part 1, surface mount engineer in the field of IC packaging from of what is being called system in package
technology evolved in response to the elec- Silicon Valley who devised a method for (SiP) today is, except for the substrate,
tronic industry’s desire to create products automating assembly of ICs in reel-to-reel very similar to hybrid technology. The
that would follow the established pattern fashion, and the other was John Marley assembly methods that were used were not
and market expectation for faster, lighter, of ITT, who invented a device that was very efficient, since military products were
cheaper and better electronic products. It not only TAB-like but was among the first not high volume and the substrates were
also recalled the fact that the first surface to describe what later came to be called a more expensive, but this was being offset
mount components were actually intro- multichip module. Between them they had by the smaller size and performance gains
duced with the first ICs from Texas Instru- invented the important elements of TAB achieved. The problems arose when the
ments in the form of flat pack devices. technology (Figure 1), which later found printed circuit started to mount these ce-
However, before the advent of significant fairly wide popularity for many mid to high ramic devices (which often had castellated
!
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Figure 1. Drawings from U.S. patents for semiconductors on the left US 3440027 “Automated Packaging of Semiconductors” by Frances Hugel filed in June of 1966 and on
the right US 3390308 “Multiple Chip Integrated Circuit Assembly” by John Marley filed in March of 1966
4 – Global SMT & Packaging – May 2009 www.globalsmt.net
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