Advertisement Feature Cover Story Power supplies for tough test challenges
Peyman Safa at Agilent Technologies explores the occurrence of voltage drop and how to achieve the lowest possible level by selecting optimal load leads and power supplies, using local bypassing
T
oday’s integrated circuits are operating faster than ever. The increased operating speed can lead to highly dynamic power demand from the power supply, which poses a challenge during testing when you source power using programmable power supplies.
The high-speed current waveforms can lead to voltage drops at the inte- grated circuit. If it is severe enough, the voltage drop can reset the micro- processor or cause anomalies in your test results. This article explains why this voltage drop occurs and how to mitigate the voltage drop.
In many cases, physical constraints force you to position the power supply several feet away from your IC test board, necessitating at least a few feet of load lead wiring. Load lead wiring impedance can very quickly degrade the source impedance experienced by the IC. Almost all programmable power sup- plies provide sense lead inputs, which allow you to select the point of voltage regulation by connecting the voltage sense leads at that location.
In this application, the sense point would be as close as possible to the IC. However, the voltage regulation loop can suppress voltage transients at this sense point only within its control bandwidth. A local bypass capacitor at the IC can help provide low impedance at frequencies where the combination of the power supply output and load lead wiring present too high of impedance. Let's examine a 25-amp application with 5-amp transients where the power supply is set to 2.5V and con- nected to the IC test board via 5feet of 14AWG wiring. Since this is a low- voltage application, voltage under- shoots greater than 100mV are generally not acceptable. 14AWG wiring has 2.5milliohms of resistance per foot, resulting in 25milliohms of resistance for the round trip connec- tion between the output of the power supply and the IC test board.
load lead inductance at approximately 170nH/ft will only make matters worse. The addition of a bypass capacitor, as shown in figure 1, can however provide a significant improvement.
The interaction between the power supply voltage control loop, the load lead network and the bypass capaci- tance can be a bit complex. However, some useful approximations can help you with the initial value selection for the capacitor.
The Process
1.Calculate peak network impedance Determine the desired peak imped- ance of the load lead network and bypass capacitance by using the following expression:
Peyman Safa is Hardware Design Engineer, Power Division at Agilent Technologies
Figure 1: Load lead network with bypass capacitance
Proper damping of the resonant tank is crucial since an improperly damped tank will tend to ring and can also have a destabilising effect on the power supply control loop.
The combination of the load lead resistance and capacitor ESR will work to damp the resonant tank. We will target a damping ratio of 0.5 for faster response and lower peak voltage by equating the tank resistance to the L-C tank’s characteristic impedance.
Different combinations of capacitors can be used in parallel to achieve the desired ESR if necessary.
2. Calculate bypass capacitance value Set the desired peak impedance equal to the expression for the characteristic impedance of the L-C tank formed by the load lead inductance and the bypass capacitance. In this example we are assuming four parallel twisted pair cable runs are used to cut the inductance down by a factor of 4.
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Figure 2 shows the voltage transient response as observed at the load when using Agilent Technologies N7950A dynamic DC power supply. This unit is optimised for low voltage and high current operation and offers very low output impedance, which is ideal for this application. Two scenarios discussed in the example are shown, both using four runs, 5feet long, each of twisted 14- AWG cabling, but one aided by the local bypass capacitor at the DUT. A third scenario is also shown. It uses four times more local bypass capaci- tance to drop the tank impedance by a factor of approximately two. In this article we explored the chal- lenge of supplying a highly dynamic load with a stable voltage using a power supply located several feet away from the device under test. Although the load lead impedance can severely degrade the transient response performance of a high-performance power supply, with the mitigation practices we discussed, you can achieve the required perform- ance at the device under test. Properly sizing a bypass capacitor network at the device under test can improve voltage level stability in the face of fast current transients drawn by the device under test.
3. Calculate the resonant frequency of the tank
If the power supply output impedance at the tank resonant frequency is higher than Zpeak, the tank resonant frequency must be lowered by increas- ing the capacitor until the above condition is met.
Figure 2: Load lead network with bypass capacitance
As you can see the load lead resist- ance alone is enough to cause an unac- ceptable voltage drop at the IC and the
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4. Select desired capacitor ESR to ensure proper damping of L-C tank
SEPTEMBER 2013 Electronics
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