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11-11/12 :: November/December 2011
nanotimes
Companies Facts
Dr. Bill Carter, manager of the Architected Materials Group at HRL, lays out the vision for these micro-lat- tice materials by drawing parallels to large structures: “Modern buildings, exemplified by the Eiffel Tower or the Golden Gate Bridge, are incredibly light and weight-efficient by virtue of their architectures. We are revolutionizing lightweight materials by bringing this concept to the materials level and designing their architectures at the nano and micro scales.”
T. A. Schaedler, A. J. Jacobsen, A. Torrents, A. E. Sorensen, J. Lian, J. R. Greer, L. Valdevit, W. B. Carter: Ultralight Me- tallic Microlattices: In: Science, Vol. 334(2011), No. 6058, November 18, 2011, Pages 962-965, DOI:10.1126/sci- ence.1211649:
http://dx.doi.org/10.1126/science.1211649 h
te, Germany, announced the collaboration with RIPP, which is an affiliate of SINOPEC, China´s
largest producer and supplier of petroleum products. RIPP decides to implement hte parallel reactor tech- nology to enhance its R&D efficiency in the field of oil refining.
Micron‘s Hybrid Memory Cube features a stack of indi- vidual chips connected by vertical pipelines or “vias,” shown above. IBM’s new 3-D manufacturing technolo- gy, used to connect the 3D micro structure, will be the foundation for commercial production of the new memory cube. © IBM / Micron
than today‘s technology. IBM presented the details of its TSV manufacturing breakthrough at the IEEE In- ternational Electron Devices Meeting on December 5 in Washington, DC. HMC parts will be manufactured at IBM‘s advanced semiconductor fab in East Fishkill, N.Y., using the company‘s 32nm, high-K metal gate process technology.
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BM (NYSE: IBM) and Micron Technology, Inc. announced that Micron will begin production of
a new memory device built using the first commer- cial CMOS manufacturing technology to employ through-silicon vias (TSVs). IBM‘s advanced TSV chip-making process enables Micron‘s Hybrid Me- mory Cube (HMC) to achieve speeds 15 times faster
HMC technology uses advanced TSVs – vertical conduits that electrically connect a stack of individu- al chips – to combine high-performance logic with Micron‘s state-of-the-art DRAM. HMC delivers band- width and efficiencies a leap beyond current device capabilities. HMC prototypes, for example, clock in with bandwidth of 128 gigabytes per second (GB/s).