Feature: Software & Tools


Te Schematic tab (Figure 13) shows a simplified schematic of the synthesizer.


Reference model creation Te reference model is created using the Reference Library Editor; see Figure 16. From the main menu choose Libraries/Reference Library Editor to start the desired type of editor.


Figure 13. The ADIsimPLL schematic tab


Expanding the Loop Filter folder in the data panel (Figure 14) you can modify the loop filter components to match an existing schematic such at the evaluation board schematic. Te loop filter components in the Schematic can be changed by specifying Components and changing the values as shown in Figure 14.


Figure 16. The Reference Library Editor Select New, as highlighted in Figure 17.


Figure. 17 Reference Library Editor New Model. Choose a Model Name.


Figure 14. Loop filter components


Te DACn tab allows us to look at the phase noise of the DAC output. Te plot in Figure 15 models the DAC output at 3GHz by selecting the DDS div option of 4. Non-integer DDS div values can also be selected. Te marker is enabled to read the phase noise.


Figure 18. Reference Library Editor new model name edit


Select table from the menu on the leſt. Ten input the reference frequency and PN floor used; see Figure 19.


Figure 15. The ADIsimPLL DACn tab 28 September 2024 www.electronicsworld.co.uk


Figure 19. Reference frequency and phase noise floor


Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44  |  Page 45  |  Page 46  |  Page 47  |  Page 48  |  Page 49  |  Page 50  |  Page 51  |  Page 52  |  Page 53  |  Page 54