Feature: Power supplies
Figure 5: Smart near-zero dead time setting measurements on EVAL-LTC7891-BZ hardware
models provided by GaN vendors vary from this with their included symbols and models. Innoscience, for example, uses ‘Gate Drain Source’, whilst EPC uses ‘Gatein Drainin Sourcein’. Regardless of how the name or net order is listed by the
provider, this can be made to match the LTspice convention by simply re-ordering the pasted text to match the ‘Drainin Gatein Sourcein’ convention. Since the included sub-circuit method outlined here does not rely on using any symbols, devices, or model libraries, this re-ordering to match no longer matters. Te file can be shared and opened by any copy of LTspice even if the local installation has default or modified libraries of the same device.
Te final step to any modification is to ensure that the model
works properly as intended. Aſter running the completed simulation file, observe gate
and switch waveforms to verify the simulation and provide a benchmark with which to compare actual measured waveforms. It’s important to remember that simulations – however accurate the models are – are only tools to save time, prevent costly mistakes, and lend insight into how the actual hardware functions. Gathering data from working hardware is always the ultimate verification of simulation results.
Compare the results from the evaluation board (Figure 5) for the
LTC7891 with the evaluation SPICE simulation for switch rising and falling (Figure 6). Te overall dead time is fairly accurate, but parasitic elements of the actual hardware and measurement tools are not present in the simulation. Tis is why it is important to start with simulation and end with
bench evaluation. Te gate resistors can’t be optimised in LTspice without an accurate model for the parasitic elements created by the PCB traces. Tis can only be achieved with careful measurement techniques on actual hardware to finalise the design. Importing the GaN model is the first step in this process.
Shared files Using GaN device models in LTspice from any component manufacturer that provides them can be simple and avoids library management hassles if the method suggested in this article is employed. Tis allows the circuit designer to focus on the accurate simulation of devices, instead of the frustrations associated with symbol, device and library management. Files created using this method can be repeated and shared
by anyone using LTspice. Tis also proves GaN-based power conversion design concepts, with focus on the end user’s needs.
Figure 6: Smart near-zero dead time setting simulation waveforms from example circuit
36 May 2026
www.electronicsworld.co.uk
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40 |
Page 41 |
Page 42 |
Page 43 |
Page 44