Cover story


out of the power supply (VDD


) node. The IC1 VDD


regulator cannot supply this high current, therefore the VDD


voltage drops. The VDD voltage drop


temporarily shuts down the MEMS sensor (powered at 5V nominal), resulting in voltage ripple at op-amp output (noise).


A second failure mode was identified, which would be either difficult or impossible to observe and debug using lab testing alone. High-frequency transmission lines are usually terminated with a load that matches the transmission cable impedance. The IEPE cable is typically unterminated due to low-frequency (kHz) data communication. However, when the EMC noise is injected in the 60-70MHz range, noise voltages are reflected on the communication bus as the cable is not terminated with a matching load.


Step 4: Use Simulation to Identify Design for EMC Improvements The goal is to determine the least costly and most effective circuit changes for EMC mitigation. The two EMC issues can be resolved by adding two


capacitors, as shown in Figure 5. The 22nF CEMC directs the noise away from the sensitive circuitry (op-amp, MEMS), with the noise current now shunted to ground via the C1 capacitor, as shown. A ferrite bead with high impedance at 100MHz frequencies can be added for extra insurance to block any residual noise. The CTERM


shunts cable


reflections at high frequency during EMC testing. As described in Step 3, the VDD


power net failure


is a reliable indicator of EMC susceptibility. The simulation predicts approximately 2V drop, or larger. When CEMC


is used, the deviation from nominal is in the microvolt range, which is much lower than the target compliance threshold of 1.6mV. Analog Devices’ ADXL1002 MEMS sensor has a


3dB bandwidth of 11kHz, so the selection of the CEMC and CTERM


is critical in order to preserve the 11kHz communication bus. Using the virtual lab flexibility, many capacitance values were simulated, and two optimum capacitance values were selected. After adding these capacitors, the system is predicted to meet the EMC pass criteria of less than 1.6mV of noise voltage.


Step 5: Validate Design for EMC Improvements in the Real Lab The original circuit, as described in Figure 3, was lab tested using the Table 1 parameters. The result was a gross failure of 912mV of noise at a 77MHz test frequency.


Following the Step 4 recommendations, a 22nF capacitor (CEMC


) was added in parallel with resistor Figure 6: Simulation and lab test results following virtual lab recommendations www.electronicsworld.co.uk July/August 2021 09 Figure 5: Design for EMC improvements


R3. This resulted in a 99% improvement, with less than 6mV noise measured, as shown in the Figure 6 lab test result (blue waveform). To achieve the design target of less than 1.6mV of noise, a 100nF CTERM


GND nodes, as well as the CEMC


Figure 6 shows the green simulation result with the noise curve flattened across the broad 0.15-80MHz spectrum.


Once the results and targets are achieved, it is possible to determine which part of the system is the weakest link from an EMC point of view. In this case, the cable is the main contributor as it couples the EMC energy from the source to the circuit and causes reflections due to its length and termination impedance


, were able to shunt the two noise sources to the cable to ground effectively.


at higher frequencies. The two capacitors, CTERM CEMC


was added between the ACC and 22nF.


Hence, simulating the entire system gives unprecedented insights into how the circuit behaves under EMC stress and is the best way to solve complex EMC problems. Time to market can be dramatically reduced when this methodology is used. Greater than 99% improvement in design for EMC was achieved using the process flow described here.


Analog Devices UK Tel: 01932 358530 www.analog.com


and


Figure 4. Circuit failure mechanism


Page 1  |  Page 2  |  Page 3  |  Page 4  |  Page 5  |  Page 6  |  Page 7  |  Page 8  |  Page 9  |  Page 10  |  Page 11  |  Page 12  |  Page 13  |  Page 14  |  Page 15  |  Page 16  |  Page 17  |  Page 18  |  Page 19  |  Page 20  |  Page 21  |  Page 22  |  Page 23  |  Page 24  |  Page 25  |  Page 26  |  Page 27  |  Page 28  |  Page 29  |  Page 30  |  Page 31  |  Page 32  |  Page 33  |  Page 34  |  Page 35  |  Page 36  |  Page 37  |  Page 38  |  Page 39  |  Page 40  |  Page 41  |  Page 42  |  Page 43  |  Page 44  |  Page 45  |  Page 46  |  Page 47  |  Page 48  |  Page 49  |  Page 50  |  Page 51  |  Page 52  |  Page 53  |  Page 54  |  Page 55  |  Page 56  |  Page 57  |  Page 58