Cover story
Figure 3: MEMS circuit using ADXL1002 and IEPE-compatible interface Table 1: Real lab setup and simulation environment correlation
•Test level and IEC EMC standard (amplitude, frequency);
•Cable specification (length, capacitance, shielding); •System grounding (including cable shield); •Measured parameters (what and where in the circuit);
•Test pass/fail threshold (amplitude, frequency).
Step 2: Develop Simulation Models Using Virtual Lab Typically, SPICE models are readily available for most active and passive circuit components. Electromagnetic simulators can model other nonstandard components, such as PCB geometry and nets, as well as cable models.
The information in Table 1 helps to ensure accurate modeling of cable parameters. This system uses a 2-core shielded cable, which comes at a cost premium compared to an unshielded cable. Having no cable shield makes the system weaker from an EMC point of view. Simulation with an unshielded cable shows significant additional EMC noise compared to a shielded cable system. The MEMS IEPE circuit shown in Figure 3 is designed to be as compact as possible (1.9cm × 1.9cm) and uses just two PCB layers. Using a 2-layer PCB increases potential EMC issues due to higher coupling capacitances and crosstalk, so careful design is a must. At this point, the system design engineer
08 July/August 2021
www.electronicsworld.co.uk
can start extracting the models for the PCB and cables, using electromagnetic simulation tools, and link those to the SPICE models of the ICs and passive components. Now a SPICE simulation can be performed, and EMC stimulus can interact at the system level. In this way, an extremely accurate electrical simulation can be performed. Passive component values (capacitor, resistor, inductors) can be changed, and the system resonances observed and rectified in a more time-efficient and flexible manner compared to changing and testing real hardware. The cable SPICE model can be modified during testing – for example, the cable length can be increased or decreased, which can have a significant effect on EMC coupling and system performance. Once the EMC time domain simulation is finished, engineers can analyse the circuit transient responses across time and frequency. Depending on the type of EMC test, transient or frequency analysis must be done. Examples of transient analysis can be conducted immunity tests, and examples of frequency domain are radiated emissions EMC tests (see https://www.
analog.com/en/technical-articles/achieving-99- percent-improve-in-emc-compliance-for-mems-
sys.html for more information).
Step 3: Use Simulation to Identify Design for EMC Weaknesses The failure mechanisms were easy to find once the full system was modeled and simulated. The EMC noise voltage is injected into the cable shield. The noise voltage is then coupled through parasitic capacitance between cable shield and wire cores. The noise is directed toward the ACC node on the PCB, as shown in Figure 4. The noise current follows the path of least impedance, in this case through capacitor C8 to the op-amp output. The op-amp saturates as a result, sinking high current
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40 |
Page 41 |
Page 42 |
Page 43 |
Page 44 |
Page 45 |
Page 46 |
Page 47 |
Page 48 |
Page 49 |
Page 50 |
Page 51 |
Page 52 |
Page 53 |
Page 54 |
Page 55 |
Page 56 |
Page 57 |
Page 58
