Feature: Processors and MCUs


The bootloader architecture and Flash map are consequently no longer details to leave until the end of a project – they are system-level design decisions that must be made early in the project


can then be used to auto-generate system-wide linker configurations, TrustZone Security Attribution Unit configuration and Memory Protection Unit settings. Semiconductor manufacturers complement this with


their own configuration, provisioning and security-policy tools. For experienced developers accustomed to manually controlling a linker script, the temptation may be to regard these tools as unnecessary abstraction. With multiple processors, several security domains and independently signed images, however, maintaining a single consistent system description becomes increasingly valuable. This would fit well after the paragraph introducing the architectural advantages, whilst making clear that Flashless devices also introduce new manufacturing and security considerations.


Production provisioning and lifecycle management The move to Flashless architectures also introduces additional requirements during device production and throughout the product lifecycle. Modern devices increasingly rely on hardware-enforced security, requiring each device to be securely provisioned during manufacturing with unique identities, cryptographic keys, certificates and other secrets. This creates a need for trusted provisioning processes


that protect sensitive information while establishing a secure root of trust for each individual device. This can be achieved with a High Security Module, which can create and inject cryptographic material. Security must then extend beyond manufacturing to encompass the complete device lifecycle, including secure firmware installation and updates, authentication of external memory, key and certificate management, ownership or configuration changes, and mechanisms for secure recovery. Finally, when a product reaches the end of its operational


life, controlled decommissioning is required to revoke credentials and securely erase or invalidate sensitive information. As a result, adopting these advanced devices


24 October 2026 www.electronicsworld.co.uk


is not simply a change in processor architecture; it also requires manufacturers to consider how security, provisioning, traceability and lifecycle management are integrated into their production infrastructure.


A new definition of a microcontroller The Flashless MCU represents more than another memory configuration. It reflects a broader transition in embedded computing. Advanced fabrication processes make it practical to integrate megabytes of SRAM, multiple Cortex-M processors, NPUs, graphics engines, vision interfaces and sophisticated analogue subsystems on a device still sold and programmed as a microcontroller. Removing embedded Flash helps make that transition possible but shifts complexity elsewhere. External code storage requires high-performance memory


interfaces and caching. Externally accessible firmware drives stronger encryption and authentication. Secure updates demand sophisticated bootloaders. Multi-processor systems require IPC and multiple firmware projects. TrustZone introduces secure and non-secure memory maps. TF-M introduces a secure-services architecture. AI workloads turn firmware partition sizes into system-level decisions. For senior embedded engineers, perhaps the most important


change is conceptual. The emerging model begins to extend beyond firmware and MCU to incorporate RoT management and update infrastructure; see Figure 8:


Figure 8: A modern project will require you to manage


multiple images, cryptographic resources and provide a firmware update infrastructure


PSOC Edge and STM32N6 demonstrate that this transition


is already under way. The result is unquestionably more complicated than the traditional Flash-based Cortex-M microcontroller. But it also provides capabilities that would previously have required an applications processor, separate security device, external accelerator and considerably more board-level hardware. Flashless MCUs therefore look less like an odd exception


and more like a sign of where the high-performance microcontroller market is heading: towards highly integrated edge-computing platforms in which memory architecture, security architecture and software architecture have become inseparable parts of the same design solution.


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