AUTOMATION  ANALOG DEVICES and AD74115) power dissipation using PPC


(optimised AVDD was programmed for each load resistor value) vs. different load resistor values. Two different voltages were applied to VINP of the ADP1034 (15V and 24V) to show  were taken at 25°C. Figure 4 shows the power dissipation using PPC


(optimised AVDD was programmed for each load resistor value) vs. different load resistor values over temperature.


DIGITAL OUTPUT USE CASE In industrial applications, digital output is recognised as the most power demanding use case. The AD74115H supports internal and external sourcing and sinking digital output. The ADP1034 can source enough power for the internal digital output function, capable of sourcing or sinking up to 100mA continuous 


DDDD. For currents higher than 100mA, the external digital output function must be used, which  DD.


INTERNAL DIGITAL OUTPUT USE CASE TIMEOUTS To support charging of capacitive loads on initial power-on, a higher short circuit current limit (~280mA) can be enabled for a programmable amount of time, T1, while using the internal digital output use case. A second short-circuit limit  elapsed. This is a lower current limit and is active for a programmable duration of time, T2.  during these short circuit conditions, care must


be taken to ensure the ADP1034 V voltage doesn’t dip. To ensure there is no dip, a voltage 


 DD  


INP) of 18V is recommended to ensure enough current can be sourced to the load. DD vs. T1


 sourcing high current with the ADP1034.


DATA ISOLATION AND SOLUTION SIZE iCoupler  isolated power rails including SPI data and three  package. This high level of integration helps solve PCB real estate challenges as it consolidates all channel isolation requirements into a small area on the PCB. Power savings are also realised. The


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VINP (V)


24 24


24 24 24


24 24 24 24 24


AVDD Voltage


Use Case


(V) 8.6


18 18 18 16.5


18 18 18 18 18


Current output Voltage input


  powered


Current input loop powered with HART®


Voltage output bipolar 12V range


2-wire RTD 3-wire RTD 4-wire RTD


Digital input logic


Digital input loop powered


24 12


Digital output internal


Load


250 N/A


24mA 24mA 1k


250 250 250


2.4mA sink 250


 ~278 coil resistance


Table 1: AD74115H Typical Use Case Power Dissipation Using PPC


Designing a low power, small form factor channel-to- channel isolated I/O solution can be a challenge for some of the most experienced designers in the industry.


controller side on the ADP1034 puts the other SPI isolator channels in a low power state when the channels are not in use. This means that the   and pins of the AD74115H, thus providing all the isolation requirements of the AD74115H without the added cost of an additional isolator IC.


CONCLUSION Designing a low power, small form factor  a challenge for some of the most experienced   challenge with the high level of integration and


Power (mW)


322 250


HART enabled


422 456


ZS code 345


260  268  667


Sourcing 265


Sinking 


HART disabled


334


FS code 333


Figure 5: System supply = 24V, DO_VDD voltage = 24V


Figure 6: System supply = 24V, DO_VDD voltage = 12V


 providing three isolated power rails from a single     Analog Devices: www.analog.com


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