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running an RTOS, handles low-level and real-time tasks efficiently and allows the device to remain aware in a low-power state ready to wake the higher-performing Cortex-A cores when needed. In addition, active well biasing allows CMOS transistors to be optimised for high performance in active modes while also minimising leakage in standby mode. The leakage can be reduced by up to 15 times.
domains in standby mode. In addition,
i.MX processors use Dynamic Voltage and Frequency Scaling (DVFS), which reduces both frequency and voltage to complete required tasks with the lowest possible power consumption. The way the voltage and frequency are changed in response to load changes is determined in software. DVFS can be highly effective because power is reduced
according to the square of the voltage. There is also Dynamic Process Temperature Compensation (DPTC), which adjusts the voltage in relation to die temperature to prevent power losses that result from temperature increase. There is also heterogeneous - or
big.LITTLE – processing using a combination of Arm Cortex-A application processor cores and a Cortex-M microcontroller (MCU) core. The MCU core,
How do system power modes work to reduce power consumption? The various system power modes take advantage of these features to slow down, halt, or turn off various parts of the device to save power while ensuring all required functions are performed properly. In Run mode, the normal operating mode, the core frequency, and operating voltage can be dynamically changed within a range. In Wait and Doze modes, certain clocks are gated and operation resumes on receipt of an interrupt. In State-Retention mode, the MCU and peripheral clocks are gated and the supply voltage is reduced to a minimum. There is also a Deep-Sleep mode, in which clocks are gated, power
to the Arm platform is turned off, and normal operation resumes on interrupt. In Hibernate, on the other hand, all clocks and power domains are off and operation resumes in the same way as a cold boot. Ultra-low-power devices can have even more system power modes to give a really granular control: this is where the µPower subsystem of the
i.MX 8ULP and
i.MX 8ULP-CS families comes in, with its dedicated RISC-V core to manage the device’s 20 power modes.
This article gives an overview of the mechanisms available to help manage the power consumption of applications running on
i.MX 8 processors. Utilising them to best effect demands extensive study that can still leave your application consuming more power than is ideal. At Anders, our embedded-systems engineers have extensive experience in minimising the power consumption of
i.MX 8 processors and modules, for lower energy demands and longer battery life. Contact us today to find out how we can help your next design do more with less.
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