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FEATURE DIGITAL ELECTRONICS DESIGN


Hardware and software – No longer a stigma Moving to the Next-Gen Network for 5G with FPGAs


Much of the conversation around 5G focuses on the speed and low latency it will offer. So how will larger technologies, such as automotive and IoT, be brought up to networking speed? Craig Davis, senior product marketing manager at Intel, looks to supply a solution: the FPGA


this to happen. Using standard ‘off the shelf’ hardware to virtualise functions means capacity is more fluid, much more scalable and easier to upgrade as faster hardware becomes available. A major feature in NGCN, in relation


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peed and low latency can be seen as two sides of the same coin, but while they are co-dependent, in reality, the latency is dependent on network throughput, while speed is generally measured at the periphery. Fast in, fast through and fast out will deliver the performance consumers are beginning to expect in this age. Line speeds at critical points in the


network need to be 100Gb/s or more, which means everything in the control and user plane must support these speeds too. This is a significant increase over existing network speeds and achieving it requires every part of the network to be operating at peak speed and performance.


Another common theme around 5G is how it is more than ‘just’ the next step in cellular communication evolution, and that’s true. It is, at the same time, both new and familiar; new, because of features like New Radio (needed to support mmWave operation), and familiar because it will still employ the same network functions that enable the existing infrastructure. But the way these functions are implemented will necessarily need to change, in order to meet the high speeds demanded by 5G topologies and implementations. These changes will coalesce in the core network in an impactful way. So impactful, in fact, that it is now being referred to as the Next Generation Core Network (NGCN). It may sound radical but, in truth, the industry has been moving in this direction for some time;


16 NOVEMBER 2019 | ELECTRONICS


5G is perhaps the catalyst for wider disruption, but the technologies being developed to deliver the NGCN have been in development for some time. Virtualisation is high on that list, and here’s why.


Virtualisation repositions much of


the emphasis for performance where it should have always been: on the process. It addresses the limitation of dedicated hardware, which is constrained to the immediate task. Instead, virtualisation is based on general-purpose compute power, which can be configured through software to provide, in practical terms, any function needed at any time. Software defined networking (SDN) enables network function virtualisation (NFV) which, together, are redefining the core network. One of the


reasons for this is because the NGCN needs to handle all types of traffic, both voice and data, across a wider number of scenarios (high speed for streaming video, low latency for control, low bandwidth for endpoints in the IoT). The mix of demands will change constantly, and so the underlying platform needs to adapt in response to this. SDN and NFV allows


to virtualisation, is load balancing. Understanding where the virtual functions are required and when they can be retired at any given time is crucial to maintaining high network utilisation. Accelerating network functions still depends on the throughput that can be achieved at the hardware level, but the scalability and efficiency offered by employing virtualisation means the software defined network functions can be deployed to the most efficient hardware, based on the workload. In this respect, hardware acceleration becomes integral to the overall solution. FPGAs have a long and proven history of accelerating core network functions, and now they are being applied to NFV acceleration. In terms of configurability, the FPGA is hard to beat. This configurability is also inherently scalable, which sets the FPGA apart from any other type of coprocessing resource. Using frameworks like OpenStack allows FPGAs to become part of the NFV infrastructure (NFVI); they are discovered, assigned and released based on the balanced workload. Load balancing across NICs, using a software-only approach is very compute- intensive, but by using a programmable acceleration card (PAC) like Intel’s, based on its FPGAs, load balancing speeds of 100Gb/s per socket can be achieved. After all, new


ways of achieving proven functionality at higher speeds is going to prove critical to delivering 5G.


Intel www.intel.com / ELECTRONICS


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