SMART TECH & IOT


How High Performance, Robust ADCs Are Solving Design Challenges of Modern Industrial Applications


Hakan Uenlue, Senior Field Applications Engineer, Analog Devices I


n modern production plants, a proper analogue front end (AFE) is paramount to enabling robust, precise, and accurate analogue-to-digital conversion. Due to variances across different systems and machines, a programmable logic controller (PLC) can be used to control the many complex parameters. To achieve this using analogue input modules, different sensors and signals are utilised. Many sensors like pressure, flow, temperature, and weight have analogue outputs representing the measured quantities. Therefore, many precise and accurate analogue signal inputs are required to generate digital outputs. However, analogue- to-digital conversion is just one part of the task. The connectivity between nodes, sensors, analogue input modules, and PLCs takes place in the production plant, an environment that is notorious for electrical noise and other disturbance elements, like EMI. Thus, robust ADCs are critical for effectively operating in such harsh conditions.


New Multiplexed ADCs Offer High Integration, High Precision, High Flexibility, and Robustness


PLCs contain many analogue voltage inputs to monitor their system, meaning a high number of channels.


High channel count can be achieved with an ADC that has eleven single-ended, or six differential inputs with buffers. The single- ended or differential nature of the inputs provides easy interfacing with different sensors. Furthermore, allocating some of these channels to lower input ranges is useful for current measurements with an external sense resistor. In modern multiplexed ADCs, like some of the AD411x family, such sense resistors are incorporated into the component. AFEs integrated with critical passive components, like accurate low drift matched 1MΩ and 10MΩ voltage dividers with Analog Devices’ iPassives technology, eliminate the need for costly external components. This enables higher density and at the same time, more spatially optimised solutions by minimising the solution footprint, weight, and board space.


The newest multiplexed ADCs, like the AD4116, 22


Figure 1. The internal structure of a new-generation multiplexed ADC.


have a low power, low noise, 24-bit, sigma- delta (∑-Δ) ADC that integrates a very high impedance AFE. Figure 1 shows the internal structure of the part. For utmost flexibility, the inputs can be configured independently. Each setup allows the user to enable or disable the buffer, correct the gain and offset, select the filter type, as well as the output data rate (ODR), and the reference source. The flexibility in selecting different voltage reference sources makes the design task easier. These multiplexed ADCs have versatile reference source options, like an internal low drift 2.5V source, an external reference via differential Ref+ and Ref- pins or using analogue power supply (AVDD-AVSS). For an external reference, such ADCs have true rail- to-rail, integrated precision unity gain buffers on both reference inputs. These buffers with high input impedance allow high impedance external sources to be directly connected to these inputs.


Similarly, the user of modern ADCs can select the clock source from an internal oscillator, an external crystal, or an external clock; a flexibility that eases the design process.


On the analogue side, the input is a crucial part that determines the robustness of a multiplexed ADC, as it receives external voltages from peripherals. With a single 5V supply, a modern multiplexed ADC like the AD4116 can achieve input ranges up to ±20V. This ADC can even accommodate input


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voltages beyond these voltages, due to ±65V absolute maximum ratings, without incurring damage to the device. However, in this input range, there may be trade-offs in accuracy. An external protection device like a TVS, shown in Figure 2, can protect the ADCs beyond the absolute maximum ratings. On the digital side, a CRC checksum reinforces the robustness of the interface.


The RC low-pass filter at the inputs of the ADC, as shown in the Figure 2, assists with anti-aliasing and noise filtering. An important point is that the filter resistor is placed in series with the input impedance of the ADC. This resistor will affect the internal voltage divider ratio resulting in a gain error. Nevertheless, with very high input impedance like 10MΩ of the ADC, the voltage division error will be very small. For example, if 180Ω is used, the error will be only around 0.0018%. Moreover, this error can be removed by a system calibration or adjustment of the gain settings. The former can be completed by utilising the calibration mode offered by the newest multiplexed ADCs. These modern ADCs have four sub-calibration modes: internal zero-scale, internal full-scale, system zero-scale, and system full-scale. In addition to calibration mode, for normal operation, other options include continuous conversion mode, continuous read mode, or single conversion mode. To save power in systems with constricted power budget, the user can also activate standby or power-


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