ARTIFICIAL INTELLIGENCE


making it a viable option for AI inference tasks at the edge.


Thermal management and energy effi ciency constraints


Deploying large-scale AI models on end devices introduces signifi cant thermal management and energy effi ciency challenges. . •


On-Device Memory Expansion: Mobile devices must integrate higher-capacity memory solutions to minimise reliance on cloud-based AI processing and reduce latency. Traditional DRAM scaling approaches physical limits, requiring hybrid architectures integrating high- bandwidth and low-power memory.


•


HBM3E vs CUBE for AI SoCs: While HBM3E achieves high throughput, its power requirements exceed 30W per stack, making it unsuitable for mobile and edge applications. Winbond’s CUBE memory is an alternative LLC (Last Level Cache), reducing on-chip SRAM dependency while maintaining high-speed data access. The shift toward sub-7nm logic processes exacerbates SRAM scaling limitations, emphasizing the need for next-generation cache solutions.


•


Thermal Optimisation Strategies: As AI processing generates heat loads exceeding 15W per chip, effective power distribution and dissipation mechanisms are critical. Custom DRAM solutions that optimise refresh cycles and employ TSV- based packaging techniques, such as those used in CUBE, contribute to power- effi cient AI execution in compact form factors.


Conclusion


The convergence of AI-driven workloads, performance scaling constraints and the need for power-effi cient memory solutions shapes the transformation of the memory market. Generative AI continues accelerating demand for low-latency, high-bandwidth memory architectures, leading to innovation across DRAM and custom memory solutions.


OCTOBER 2026 | ELECTRONICS FOR ENGINEERS


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