Pharmaceutical & medical


digital gain settings), and other parts of the code can be easily customised. After modifying the code, compile the program using the Mbed online compiler. Then drag and drop the generated binary file to the SDP- K1 drive. The same process can be done for other applications.


DIRECTIONS


As shown in the simplified diagram in Figure 6, device-to-device output synchronisation is performed by measuring the delay between the same DAC output channel, that is, Channel 1 of multiple devices. The effect on synchronisation of varying the TRIG2 (controller board to Board 2) with respect to TRIG1 (controller board to Board 1) and varying the length of connectors for Clock 2 (clock generator to Board 2) with respect to Clock 1 (clock generator to Board 1) can be observed using an oscilloscope.


Figure 9. Delay between OUT 1 of Board 1 and Board 2 at different TRIG2 connector lengths.


RESULTS Figure 9 documents the measurement when varying the trigger connector lengths while Figure 10 documents the measurement when varying the clock connector lengths. If TRIGGER pins are connected to digital outputs with drive characteristics like that of STM32F469NI, the microcontroller on SDP-K1, TRIGGER trace tolerance can be up to five inches to maintain device-to-device synchronisation. Matched clock input traces will result in the shortest device-to-device output delay but depending on tolerable delay in a specific system, clock trace length tolerance can be adjusted accordingly.


CONCLUSION


In ultrasound manufacturing, shortening the development process and time-to-market can be achieved by taking advantage of the design flexibility and customisation offered by the AD9106 evaluation platform. There is no need to design a new transmit subsystem prototype to be able to evaluate the synchronisation of multiple transmit DACs, like the AD9106. Instead, this can be done by using two AD9106-ARDZ-EBZ boards, one SDP-K1 controller board, and making minimal adjustments to the example Mbed codes.


Analog Devices www.analog.com


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Figure 10. Delay between OUT 1 of Board 1 and Board 2 at different Clock 2 connector lengths.


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78 June 2024 Instrumentation Monthly


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