Data acquisition
capacitance and 5 V power supply. For op amps, IQ (<1 mA per channel) and
noise (<6 nV/√Hz voltage noise density) are key specifications. The precision op amps ADA4522- 2 and ADA4084-2 are good choices, with their features listed in Table 3. For gain resistors, 1.2 kΩ/300 Ω/75 Ω/25 Ω
resistors are chosen to achieve 1/4/16/64 gain. With greater resistance, noise may increase, and with lesser resistance, more power consumption is needed. If another gain configuration is needed, resistors must be carefully chosen to ensure the gain accuracy. A differential input ADC plays the role of
subtractor. The CMRR of the ADC is >100 dB, which can meet the system requirement.
In-Loop CompensatIon CIrCuIt to DrIve LtC2500-32
The AD7768-1 has an integrated precharge amplifier to ease the driving requirement. For SAR ADCs, such as the LTC2500-32, high speed amplifiers are normally suggested for use as the driver. In this DAQ application, the bandwidth
Part Number LTC6915 AD8557 AD8556 AD8250 AD8251
Gain (min) (V/V)
1 28 70 1 1 Part Number AD8422 LT1168 AD8220 AD8224 AD8221
Gain (min) (V/V)
1 1 1 1 1
Gain (max) (V/V)
4096 1300 1280 10 8
Gain (max) (V/V)
1000 10,000 1000 1000 1000
requirement is low. For driving LTC2500-32, an in-loop compensation circuit using the precision amplifier (ADA4084-2) is suggested. Figure 8 shows the in-loop compensation PGIA used to drive the LTC2500-32. The PGIA has the following features:
R22/C14/R30/C5 and R27/C6/R31/C3 are key components to better stability for in- loop compensation circuitry.
With ADG659, A1/A0 = 00, gain = 1, and the feedback path of the upper amplifier is amplifier out ➞R22 ➞R30 ➞S1A ➞ DA ➞R6 ➞AMP —IN.
amplifier out ➞R22 ➞R8 ➞R10 ➞R12 ➞S4A ➞DA ➞R6 ➞AMP —IN. The PGIA is connected to LTC2500-32EVB to
With ADG659, A1/A0 = 11, gain = 64, and the feedback path of the upper amplifier is
verify the performance. Different passive component (R22/C14/R30/C5 and
IQ/Amp (max)
(mA) 1.6
1.8 2.7 4.5 4.5 Table 1. Digital PGIAs
IQ/Amp (max))
300 µA 530 µA 750 µA 800 µA 1 mA
VS Span (min)
(V) 4.6
4.6 4.5 4.5 4.6 Table 2. Instrumentation Amplifiers Device
ADA4522-2 ADA4084-2
(max) (µV) VOS 5 100
IBIAS (max)
150 pA 250 nA
GBP (typ) (MHz) 2.7 15.9
0.1 Hz to 10 Hz
(typ) (nV p-p) 117 100
VNOISE
VNOISE Density (typ) (nV/√Hz)
5.8 3.9
Current Noise Density (typ)
(fA/√Hz)
800 550
Table 3. Low Noise, Low Power Operational Amplifiers 48 September 2021 Instrumentation Monthly (typ) (µA) IQ/Amp
830 625
VS Span (min) (V)
4.5 3
(max) (V) VS Span
55 30
VS Span (max)
(V) 36
40 36 36 36
Input Voltage Noise (typ)
(nV/√Hz) 8
10 14 14 8
VS Span (min)
(V) 2.7
2.7 5 10 10
VS Span (max)
(V) 11
5.5 5.5 30 34
Input Voltage Noise (typ)
(nV/√Hz) 50
32 32 18 18 Figure 7. Block diagram of a discrete PGIA.
R27/C6/R31/C3) values are tried to reach better THD and noise performance at different gain (1/4/16/64). The final components values are: R22/R27 = 100 Ω, C14/C6 = 1 nF, R30/R31 = 1.2 kΩ, C3/C5 = 0.22 µF. The measured 3 dB BW at gain = 1 below PGIA is about 16 kHz.
BenCh evaLuatIon setup
To test the noise, THD, and CMRR performance, a discrete ADA4084-2 PGIA and AD7768-1 board were made as a total solution. This solution is compatible with the EVAL-AD7768-1 evaluation board, so it can interface with the control board SDP-H1. Thus, the EVAL- AD7768FMCZ software GUI can be used to gather and analyse data. The ADA4084-2 PGIA and LTC2500-32
board is designed as an alternative total solution. The board interfaces to the SDP-H1 controller board, which is controlled by the LTC2500- 32FMCZ software GUI. In both boards, the PGIA’s gain is designed
as 1/2/4/8/16, which is different from what is shown in Figure 8. Table 5 shows the evaluation results for these two boards.
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