Data acquisition
SeiSmic Signal chain Solution: aDa4084-2 Pgia anD ltc2500-32
The LTC2500-32 is a low noise, low power, high performance 32-bit SAR ADC with an integrated configurable digital filter. With 32-bit digitally filtered low noise and low INL output, it is targeted for seismology and energy exploration. A high impedance source should be buffered to
minimise settling time during acquisition and to optimise the switch cap input SAR ADC linearity. For best performance, a buffer amplifier should be used to drive the analogue inputs of the LTC2500- 32. A discrete PGIA circuit must be designed to drive LTC2500-32 for both low noise and low THD, which is introduced in the PGIA section.
Pgia imPlementation The key specifications of a PGIA circuit include:
Power supply: 5 V minimum
Since the AD7768-1 has 19.7 mW, the PGIA circuit should be <13.3 mW to meet the 33 mW power consumption target
Noise: the noise at gain = 1 is 0.178 µV rms, about 1/10 of AD7768-1’s 1.78 µV rms
There are three types of PGIA topologies: An integrated PGIA
A discrete PGIA with an integrated instrumentation amplifier
A discrete PGIA with an operational amplifier Table 1 lists ADI’s digital PGIAs. The
LTC6915 has the lowest IQ. With 50 nV/√Hz noise density, the integrated noise within the 430 Hz BW is 1.036 µV rms, which exceeds the 0.178 µV rms target. Because of this, an integrated PGIA is not a good choice. Table 2 lists several instrumentation
amplifiers, including the 300 µA IQ AD8422. The integrated noise within 430 Hz BW is 1.645 µV rms, so it is not a good choice, either.
noiSe Simulation
LTspice can be used to simulate the noise performance of a discrete PGIA. The integral noise BW is 430 Hz. Table 4 shows the noise simulation result of two different PGIAs and the AD7768-1. The ADA4084 solution has better noise performance, especially at high gain.
DiScrete Pgia by oPerational amPlifierS
The article “Programmable Gain Instrumentation Amplifiers: Finding One that Works for You” discusses the various integrated PGIAs and supplies good guidelines for building a discrete PGIA when trying to meet a specific requirement. Figure 7 shows the block diagram of a discrete PGIA circuit. ADG659/ADG658 can be chosen with low
Instrumentation Monthly September 2021 Figure 5. ADA4084-2 PGIA and LTC2500-32 signal chain solution. Figure 4. MCU post-FIR filter stages. Figure 3. Balancing the AD7768-1’s ODR for targeted noise with MCU postfiltering.
Figure 6. LTC2500-32 flat pass-band filter noise for different downsampling factors. Continued on page 48... 47
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