Data acquisition

similar to testing an amplifier, but instead of voltage out, it codes out. For ac PSRR, the PSRR of an ADC is the ratio of the power in the ADC output at the frequency to the power of a

200mV p-p sine wave applied to the ADC VDD supply of frequency. Figure 4 and Figure 5 show the test configuration and resulting typical response for a SAR ADC, respectively.

essentially the same as testing an amplifier. An ac signal is superimposed on the dc supply voltage and the relationship between the stimulus on the supply and µModule output is measured. However, due to the internal supply decoupling capacitors, as the input frequencies into the supply increase, so does the need for increased current drive capability from the signal source. The internal capacitance does provide increased immunity to ac PSRR, but the test is intended to account for a worst-case scenario. Signal chain µModule solutions can be applied

For dc PSRR testing, the error is the Figure 2. Example of a discrete PSRR test circuit.

utilises a methodology of well-established standards and methods. The PSRR test of a discrete component is usually performed without any external supply decoupling capacitance, intentionally revealing the direct impact on performance of substantial noise on the power supply rails. Usually, a function generator and scope, or

network analyser, can be used to characterise the PSRR of an amplifier by injecting various frequency tones into the dc supply voltage and measuring the amount of perturbation at the DUT’s output.

Figure 4. Single-ended ADC ac PSRR test circuit.

maximum change in the full-scale transition point due to a change in power supply voltage from the nominal value.

in a wide variety of applications, so the PSRR of the SiPs must be tested similarly to a discrete part in the final application. Although there are multiple discrete components, it can be difficult to predict how the full system will respond to the ac supply stimuli. From a characterisation perspective, internal

bypass capacitance and proper evaluation board design are the most important things to consider for properly testing PSRR (the evaluation board design is described further in this article in the “Design Considerations for Evaluation Board Development” section). Any internal bypass capacitors improve the ac PSRR of the signal chain µModule solution, but this capacitance affects how the test should be performed. As previously noted, signal generators do not

Figure 5. ADC ac PSRR response.

Figure 3. PSRR vs. frequency for the ADA4945 fully differential ADC driver.

Performing an ac PSRR test on a discrete part

requires injecting the ac signal into the dc supply voltage and measuring the output disturbance relative to stimulus on the supply. For example, the ADA4945 has a PSRR of 115 dB at a

frequency 100 kHz. This means that a 1 VPEAK, 100 kHz ac disturbance on the supply manifests

as an approximately 1.79 µVPEAK signal at the output of the device. Testing PSRR performance of an ADC is

Figure 6. Block diagram of a PSRR setup with ADA4870.

The challenge with testing SiPs for PSRR

is that they contain multiple internal bypass capacitors up to 30 µF, and most signal generators and network analysers struggle to drive such large capacitive loads at higher frequencies.

How to CHaraCterise tHe Psrr of a signal CHain µModule solution When characterising the PSRR of a signal chain µModule solution, the test methodology is

To supply enough current, a high power

amplifier such as the ADA4870 can be used to provide additional current sourcing capability. This setup assumes that the function generator being used can provide the necessary dc voltage to bias your DUT. If that is not the case, a bias tee can be used to isolate the dc and ac signal paths, or you can gain up the available dc bias from a given signal generator that otherwise

have the capability to drive larger capacitive loads. For example, consider a signal chain µModule solution with a total 3 µF internal bypass capacitance on its main supply, and a PSRR test calling for a maximum frequency of 10 MHz and an amplitude of 50 mV p-p. Based on these conditions, a signal generator producing a sine wave would need to be able to drive approximately 4.71 A of current and have enough bandwidth to handle a 10 MHz signal. This is based on the impedance of the decoupling capacitor at 10 MHz.

Instrumentation Monthly November 2020

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