Power Supplies Reliable memory
Exar’s Kevin Parmenter explains how best to power, but also terminate, DDR II and III memory systems
D
DR memory or Double Data Rate Synchronous dynamic random access memory (DDR SDRAM) is very popular in many computing and embedded applications. Originated by the Joint Electron Devices Engineering Council (JEDEC), the evolution of the technology has spanned from the original DDR memory specification in the late nineties to 2000-2003 when various revisions were released which culminated in DDR1 or simply DDR SDRAM. New designs have followed and DDR4 now is looming. However, when DDR2 became available, it included modifications which enabled higher clock speeds and performance above 400 MHz. As the industry ramped up, DDR3 met the needs of higher performance systems that deliver higher peak data transfer rates and that can support data rates of many times the clock speed. For example, higher performance VLSI processors will only work with DDR3 memory due to the sustained data rates extending up to several GHz and the low latency needs that are required to keep the system fed with data.
DDR and power DDR3 memory provides a significant power reduction - about 30% - compared to DDR2 modules due to its nominal 1.50 V supply voltage, compared to DDR2's 1.8 V or DDR's 2.5 V. The 1.5 V supply voltage works well with the 90 nanometer fabrication technology used in the original DDR3 chips but the latest voltages specified for DDR3 is now specified at 1.35 volts. However, as process technology advances its desirable to change the voltages that are needed as the geometries drop as manufacturing process technologies. In fact the trend is towards lower voltages and higher levels of accuracy and precision mandated by the power supply rails. According to JEDEC the maximum
recommended voltage is 1.575 volts and should be considered the absolute maximum when memory stability is the main consideration. In addition, memory modules must withstand up to 1.975 volts before incurring permanent damage, although they are not required to function correctly at that level. The reduction in
process geometries dictate the physics of the power rails required and the precision and accuracy required as well as the resolution of the margining applied to the memory.
Memory does not do much by itself but, when it is connected to the rest of the system, the power system complexity increases in order to optimise and protect the system when the memory is connected to the system it interfaces with. This ensures reliability, reduces power consumption and eliminate sneak paths in system operation.
If a system consisted of just DDR
memory, with the necessary rails and termination voltages, it might be challenging enough to support the power supply rails at the necessary voltages with the accuracy and precision required to make the memory system work. As process geometries fall it would be advantageous to plug in new technology modules in designs without a re-design of the power supply hardware.
When combining DDRx memory and interfacing them with other VLSI components its necessary to include the ability to sequence rails, add delays to rails when bringing up or shutting off the rails, especially as today processors often have multiple rails themselves.
Interacting with other devices tied to them such as memory sequencing, timing, voltage accuracy, and slew rates of start up and shut down is also becoming critical and, as a result, the power supply interactions have become a non-trivial
system concern. Additionally, as the system evolves during its life cycle what if the system requirements change as the device specifications are revised by the suppliers? Memory and VLSI devices are now changing more rapidly than the expected lifetimes of the products they go into. It is therefore critical for the product to be able to modify the power supply characteristics under its own software control. The question becomes what are the options available to a designer when something like this is presented to the power supply team from the digital-software engineers? This has to be duplicated in something
affordable that can be incorporated into the product – usually without much design time. A build- it-yourself design will require a handful of DACS, ADC’s, digital pots, microcontrollers, precision resistors, capacitors, PWM controllers and design time. A designer could choose to use one of the complex “system monitor – power manager” devices, which incorporate some of this functionality, yet still require external PWM controllers to be connected to it in order to begin to provide our system level power requirements. These parts tend to be rather expensive and include features that aren’t required. Another approach could be to use a
software programmable power solution which incorporates digital power control which gives a great deal of flexibility to the designer and a graphical user interface to allow the design engineer to easily set up the system. An example is Exar Corporation’s Power XR family of products
30 July/August 2011
Components in Electronics
www.cieonline.co.uk
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