ANALYSIS & OPINION: PHOTONIC INTEGRATION
CIRCUIT TRAINING
PIC your test to deliver reliable optical component performance in a next-generation world
FRANÇOIS COUNY T
he extensive use of photonics integrated circuits (PICs) driven by advanced networking technologies has significant implications for testing
the key components that underpin today’s telecom networks. Te 2020 telecom world sees proliferation of 5G globally, an increase in network and data centre rates to 400G, greater bandwidth and energy efficiency requirements for high-speed networks, and ongoing and escalating demand for compact, connected devices. Component vendors need faster and more reliable test methods than ever before to keep pace with this burgeoning demand and to accommodate new optical component characteristics. With the goal of addressing pain points for
telecom vendors, PIC technology has arguably revolutionised the components industry by enabling a mix of optical and electronic functionalities on a single chip, reducing size, power consumption and cost, while boosting reproducibility and yield. But the sheer volume of PIC components that require testing, plus the need for accurate testing at every stage of design, fabrication, assembly and packaging, creates daunting challenges for manufacturers. To ensure peak performance, solutions
have been developed to ensure the speed and reliability of PIC testing both in the manufacturing process and in deployment.
Today’s networks Te telecom industry has been using PIC
14 FiBRE SYSTEMS n Issue 26 n Winter 2020
technology for more than a decade in such devices as semi-conductor optical amplifiers, Mach-Zehnder (MZ) modulators, coherent transceivers and tunable lasers. Te efficiency, scalability, high manufacturability and constantly decreasing form factor of PIC components will continue to make them crucial as next-generation networks are deployed. Te increased density on cell sites and
base stations, more fibre installed than ever before, and more components and PICs to help process the increase in data, makes optimum PIC performance crucial. Testing is an integral part of each stage in a PIC project, so much so that TAP (test, assembly and packaging) constitutes up to 80 per cent of the total cost of PIC production. Te fundamental characteristic of an optical
component is its spectrum, and parametric testing is performed at an early stage to avoid integrating defective devices. As a result, parametric tests should be performed on PICs at the wafer level, prior to wafer cuting and packaging, so that hundreds of PICs can be characterised and automatically selected, and faulty components eliminated.
Traditional methodologies Te goal for manufacturers is to ensure that all PICs are tested using a consistent, uncomplicated method that produces accurate and reliable results. Tis sounds straightorward, but testing key parameters on the multitude of active and passive optical, electronic, or RF
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