Feature: Power supplies
Reducing light load losses T e drop in effi ciency can be up to 10% at light load and is a real problem when trying to meet standby or no-load energy consumption limits. A solution is to clamp or ‘fold back’ the maximum frequency allowed, by forcing the circuit into DCM at light loads, where the higher peak currents compared with CrM are already lower. So, a good solution for PFC technique at medium loads and
high effi ciency across the line and load range is the totem-pole arrangement with frequency clamping. T e circuit should use a combination of silicon MOSFETs for AC line synchronous rectifi cation and wide band gap switches for the high-frequency ‘leg’. Controlling this circuit is a challenge, however: with four active devices to drive, detection of zero diode current to force CrM and automatic crossover to DCM at light load, while at the same time regulating output voltage and maintaining a high power factor. Switch overcurrent protection is desirable, as is output over-voltage detection. All this can be realised by implementing the complex control algorithms in a microcontroller, interfaced to the switches and sensed parameters. However, this solution can be expensive, and the power designer must get involved in coding the device for optimum performance – a daunting and time-consuming task for the unfamiliar.
Figure 4: ON Semiconductor NCP1680 evaluation board
TPPFC CrM controller A simpler solution is now off ered by ON Semiconductor, requiring no coding. T e NCP1680 is believed to be the industry’s only mixed- signal CrM TTPFC controller off ered in a SOIC-16 package. T e device has a proprietary low-loss current sensing architecture and proven control algorithms, for a cost-eff ective, low-risk yet high- performance solution. T e part features constant on-time CrM and ‘valley’ switching during frequency foldback at light loads, to enhance effi ciency by switching at a voltage minimum. T e digital voltage control loop is internally compensated for ease of design, with optimised performance across the load range. Cycle-by-cycle current limiting is included for protection, without requiring a Hall- eff ect sensor. A simplifi ed schematic showing the implementation of a totem-pole PFC stage using the NCP1680 is shown in Figure 3. An evaluation board for the NCP1680 is also available (Figure 4);
it uses GaN HEMT cells for the fast switches and Si MOSFETs for the AC line synchronous rectifi ers. It provides 300W at 395VDC from 90-265VAC line and shows full load effi ciency peaking at close to 99%, with 98% achieved across the line range down to 20% load; see Figure 5. With the availability of wide-bandgap semiconductors and a
cost-eff ective, mixed-signal, critical conduction mode controller from ON Semiconductor, the totem-pole PFC stage becomes an ideal solution for high-effi ciency power factor correction to several hundred watts, whilst enabling compliance with the 80+ Titanium effi ciency standard and eco-design requirements for standby and no-load losses. With demand for higher effi ciency coming from every vertical
Figure 5: Effi ciency plots of the ON Semiconductor NCP1680 evaluation board
sector, the improvement in active PFC that can be achieved using CrM to reduce losses at all load levels will be welcomed by manufacturers, consumers and utility service providers. Engineers can start evaluating the NCP1680 now, and bring higher levels of effi ciency to new product development in all application areas.
18 October 2021
www.electronicsworld.co.uk
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