Feature: Medical
Figure 6: The FerriSSD device optimises the choice of ECC algorithm
correcting bit errors, mainly used when bits are lost due to ageing in NAND Flash. T e second method is to minimise the number of bit errors that need detection and correction, achieved by monitoring the health of the memory cells, retiring cells that are no longer reliable, and refreshing data bits in ageing cells to top up the amount of charge in those that have suff ered electron leakage. T e technologies that work on maintaining data integrity are
mature and have existed a long time. T e fi rst widely-used ECC algorithm, Hamming code, was developed in the 1950s, followed by the Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes. More recently, an advanced error correction code, Low Density Parity Check (LDPC), has found favour because of its ability to correct both hard- and soſt -bit errors. Engineers continue to develop new ways of detecting and
correcting bit errors, reducing the computational burden of implementing an algorithm and reducing latency in read and write operations; this work has led to many ECC algorithms. And, whilst the fundamental technologies are universally available to all SSD manufacturers, the choice of the ECC method and its implementation can lead to big diff erences in performance between SSD models – in terms of data retention as well as read and write speeds. T is is because the eff ects of data retention are unique and individual to each SSD unit, so the eff ectiveness of the ECC implementation and data management system depends on how well they are adapted to that unit. Data retention eff ects vary partly because of user behaviour –
some units are exposed to higher operating temperatures or higher numbers of P/E cycles, and so on. On top of this, small variations in the characteristics of NAND Flash dies occur not only between products from one NAND Flash manufacturer and another, but even across production batches from a single NAND Flash manufacturer, fabricated at a given node. In addition, the types of data storage operation vary from application to application: some data might be continually erased and replaced by new data, whereas in another application, stored data might remain unchanged for many years. An SSD that performs adaptive ECC can adjust its operation to
optimise either for long data retention or for latency, when data is continuously replaced.
18 March 2024
www.electronicsworld.co.uk
Technology improvements Silicon Motion, the manufacturer of the FerriSSD series of embedded storage products, is now responding to the demands of medical, automotive and industrial equipment makers for long data retention and fast read and write speeds, whilst taking advantage of the greater memory density provided by TLC NAND Flash technologies. Silicon Motion builds on the foundation laid by its proven NANDXtend data
retention system, based on various ECC algorithms; see Figure 4. When the SSD has been subject to few P/E or temperature cycles and the risk of random bit errors is low, it applies a standard BCH algorithm to maintain low latency and fast performance. As the SSD ages, it applies steadily stronger ECC schemes – LDPC (Low Density Parity Check) ECC and Group Page RAID. And, now, with the introduction of the 6th generation of data-
recovery technology, users benefi t from more granular optimisation of ECCs. T is 6th generation uses Artifi cial intelligence (AI) and machine learning techniques to enable each individual SSD to adapt its ECC operation to the application’s temperature and data cycling, as well as the characteristics of the memory cells. T ese benefi ts continue until the SSD’s end of life, at which point the typical random bit error rates are as high as 0.6%, requiring the application of strong ECC algorithms with slow read and write operations. NANDXtend technology approximately doubles data throughput at end of life compared with others. T is improved ECC operation is backed up by other systems that further protect data integrity and the SSD’s lifetime: • End-to-end data path protection applies ECC algorithms at
every point at which data is transferred inside the SSD; see Figure 4. T e NANDXtend technology addresses bit errors caused by ageing, and end-to-end data path protection addresses bit errors caused by internal data transfers. • IntelligentScan + DataRefresh technology monitors the voltage
and temperature status of the memory cells, and refreshes the data in at-risk cells; see Figure 5. It is capable of extending NAND Flash array lifetimes far beyond the nominal P/E cycle lifetime specifi ed by the manufacturer; see Figure 6. T e intelligence of the IntelligentScan feature also includes automatic response to temperature, with more frequent scans when operating at high temperature. When a cell’s oxide layer has degraded so much that it can no longer be suffi ciently recharged, the IntelligentScan function will repair it if possible, or retire it, thus avoiding any risk to data integrity. T e controller in the Ferri products also implements advanced
global wear levelling, so that P/E operations, and thus wear, are evenly allocated across the entire array. ECC technology and data management systems can then be
implemented in SSDs to maintain data integrity and overcome the data retention problems inherent in advanced TLC and QLC NAND Flash memory.
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