Feature: Medical
T us, SSD manufacturers continue to develop improved
memory management technologies, to off set the reduced data retention of TLC and QLC NAND cells, and ensure that high- density NAND memories do not impair the SSD’s ability to provide reliable long-term data storage. Today state-of-the-art in SSD memory management incorporates complex data enhancement and error correction technologies.
Experiencing data retention failure Data is lost when a memory cell ages, making it leak electrons. When electron leakage causes the cell voltage to fall below a certain threshold, the bit can no longer be reliably read; see Figure 1. T e host processor sees this as a bit error. Ageing is not the only cause of bit errors: they also occur during
Medical electronics systems require most-eff ective data retention technologies
By Jason Chien, Product Marketing Director, Silicon Motion
Figure 1: Over time electrons can escape from the programmed fl ash cells, causing the loss of threshold voltage
S
olid-state disks (SSDs) are a mainstay of embedded computing. T e latest 3D TLC (Triple-Level Cell) NAND Flash memory technology off ers extraordinary storage density, enabling SSD products such as Silicon Motion’s FerriSSD storage devices to provide as much as 480GB of storage in a BGA chip package that
measures just 20mm x 16mm. However, the advanced NAND Flash technology on which
embedded SSDs are based is not without its drawbacks. As NAND Flash technology migrates to ever smaller process nodes, the memory’s data retention becomes progressively worse – data retention is the period over which the Flash memory can be guaranteed to store a bit of data without loss or corruption. T is is potentially a problem for makers of embedded systems for the medical, automotive and industrial sectors, where extended data retention of some ten years can be a critical performance requirement.
16 March 2024
www.electronicsworld.co.uk
programming, when data is written to or read from the memory. For high reliability, medical, automotive and industrial system developers require bit error rates as close to zero as possible over the entire life of the SSD. SSD manufacturers implement this with technologies that manage and correct the causes of bit errors. T e data retention problem associated with the latest TLC and QLC
Figure 3: Data retention in NAND Flash cells dramatically declines as temperature rises
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