Column: Silicon systems design
Figure 1: Intent-controlled AI-assisted verifi cation fl ow
it matters, where it applies and what evidence is required for confi dence. It connects the specifi cation, architecture, verifi cation plan, testbench, assertions, coverage model and sign-off review into a coherent engineering argument. At the block level, intent may include
register behaviour, reset sequencing, protocol rules, interrupt handling, error responses and corner-case operation.
At the sub-system level, it may include arbitration, ordering, coherence, quality of service, power-management dependencies and security boundaries. At the system level, it may include soſt ware-visible behaviour, integration assumptions, performance expectations and recovery paths. T is intent is the control layer above verifi cation execution. It allows a team to
ask the right questions: Does this test map to a required scenario? Does this assertion check the intended behaviour or only a narrow implementation detail? Does this coverage point represent a meaningful risk, or is it just a number? Does this waiver close a valid exception, or does it hide an unresolved issue? AI does not remove the need for these
questions – it makes them more urgent. AI can support verifi cation execution
Figure 2: Applying AI risk management thinking to AI-assisted verifi cation [Source: NIST]
and analysis, but sign-off confi dence depends on whether the generated evidence remains aligned with the explicit verifi cation intent.
Where AI introduces risk AI-generated verifi cation content oſt en appears credible because it uses the domain’s language. A sequence, assertion, coverage suggestion or debug explanation may look familiar enough to be accepted too quickly. T at is one of the main risks. T e tool may not understand the full
design intent, legal stimulus constraints, previous assumptions, verifi cation environment limitations, safety goals, security requirements or system-level dependencies. It may generate something that is technically formatted but contextually wrong. It may also introduce duplication, noise or false confi dence if outputs are not reviewed and traced. Traceability is a particular concern. If an AI-generated test, property or summary
www.electronicsworld.co.uk July/August 2026 13
Page 1 |
Page 2 |
Page 3 |
Page 4 |
Page 5 |
Page 6 |
Page 7 |
Page 8 |
Page 9 |
Page 10 |
Page 11 |
Page 12 |
Page 13 |
Page 14 |
Page 15 |
Page 16 |
Page 17 |
Page 18 |
Page 19 |
Page 20 |
Page 21 |
Page 22 |
Page 23 |
Page 24 |
Page 25 |
Page 26 |
Page 27 |
Page 28 |
Page 29 |
Page 30 |
Page 31 |
Page 32 |
Page 33 |
Page 34 |
Page 35 |
Page 36 |
Page 37 |
Page 38 |
Page 39 |
Page 40 |
Page 41 |
Page 42 |
Page 43 |
Page 44
