Technology
Wafer exchange proof paves the way for a unified European platform to develop emerging memory technologies
CEA-Leti and Fraunhofer IPMS have successfully completed the first exchange of ferroelectric memory wafers within the FAMES pilot line, marking a pivotal milestone in establishing a shared European platform for advanced embedded non- volatile memory technologies. “The successful wafer exchange marks
an important step toward a joint European material testing platform for ferroelectric memories,” said Dr Wenke Weinreich, Division Director of Fraunhofer IPMS’s Centre Nanoelectronic Technologies. “By combining our processing expertise with CEA-Leti’s CMOS integration capabilities, the pilot line provides a powerful environment for evaluating new ferroelectric stacks and accelerating their path toward system-level applications.” Te aim of the FAMES pilot line is to
provide a unified European platform for developing and validating emerging memory technologies, such as OxRAM, MRAM, FeRAM and FeFET. By enabling collaborative material development and standardised characterisation, the initiative aims to strengthen Europe’s capacity to design and manufacture the low-power, next-generation chip architectures required for the future of computing. The collaboration has first achieved the
processing and electrical characterisation of hafnium-zirconium oxide ferroelectric capacitor stacks. Combining the 300mm CMOS cleanroom capabilities of both institutes, the wafers were circulated in short process loops to enable joint evaluation of materials, electrode configurations and device behaviour. Te work also validated the wafer exchange
and contamination control protocols implemented in the pilot line, demonstrating that complex material stacks can be processed reliably across multiple advanced
04 April 2026
www.electronicsworld.co.uk
Hf02
-based ferroelectric memory
semiconductor facilities, on all wafers. Initial experimental results have already
yielded critical insights. Te team screened various electrode materials to enhance performance, finding that titanium nitride (TiN) bottom electrodes significantly outperform tungsten. In reliability tests, TiN exhibited lower
failure rates aſter 107 field cycles at 4MV/ cm. Furthermore, clear cross-split effects were observed across different electrode configurations, confirming the sensitivity of the test vehicles to process variations. Looking ahead, the wafer loops lay the
groundwork for broader collaborative development. Upcoming phases will integrate HfO2-based ferroelectric stacks
from Fraunhofer IPMS into CEA-Leti CMOS processes, followed by array-level evaluations of state-of-the-art memory technologies embedded in the upcoming GlobalFoundries’s 22nm FDX Memory Advanced Demonstrator Multi Project Wafers shuttle prepared by CEA-Leti. Te roadmap also includes studies on
electrode process variations, long-term reliability, and back-end-of-line integration approaches. The initiative was launched in December
2023 and coordinated by CEA-Leti. It is a five-year initiative that has already demonstrated the viability of circulating complex material stacks across some of its leading research fabs.
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