Column: Design problem solvers
Figure 1: Local connection of PGND and AGND right at the solder contacts
Not so simple The answer to the question of how to deal with the grounds AGND and PGND is not that simple, which is why this discussion continues. At the beginning I mentioned that many users of
as the inductances of the respective pins, there is already a certain amount of decoupling of PGND and AGND, resulting in a low level of mutual interference between the circuits on the silicon. The other approach involves additional separation of
AGND and PGND on the board into two separate ground planes connected to each other at one point. Through this connection, interfering signals (voltage offset) remain largely in the PGND region, while the voltage in the AGND region remains very calm and very well decoupled from PGND. However, the disadvantage is that, depending on the transients in the pulsed currents and the current intensities, there may be a significant voltage offset between PGND and AGND at the respective pins. This can lead to improper functioning of – or even damage to – a switching regulator IC.
Example implementation Figure 2 shows an implementation of this approach on a 6A step-down switching regulator, the ADP2386. The grounding question comes down to a trade-
off between strong separation with the advantage of separating noise and disturbances, and running the risk of generating voltage offsets between the two grounds and thus causing harm to silicon and compromising functionality. Te right decision to make in regard to this trade-off
is heavily based on the IC design, including switching transition speeds, power levels, parasitic inductances on bonding wires and IC package, and the latch-up risk of each IC design involving the individual semiconductor process.
Figure 2: Separated AGND and PGND connected under the GND tab by vias
switching regulators adopt the board layout and the ground connection type from the example circuit supplied by the IC manufacturer. This procedure is useful because it is usually assumed that the manufacturer also tested the respective IC in this configuration. It can also be seen in the examples given in Figures 1 and 2 that the respective IC pinout is suitable for local ground connection close to PGND and AGND, or for separate grounding. Of course, an IC manufacturer may make mistakes
when designing example circuits. That’s why it is good to have some further information about the underlying approaches.
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