Column: Design problem solvers
Handling separate ground connections in switching regulators
By Frederik Dostal, Power Management Technical Expert for Europe, Analog Devices
Where do I connect the grounds of switching regulators?
Answer:
How should you proceed with a switching regulator with an analogue ground (AGND) and a power ground (PGND)? This is a question asked by many developers designing a switching power supply. Some are accustomed to dealing with a digital GND and an analogue GND; however, their experience frequently fails them when it comes to power GND. Designers then often copy the board layout for a selected switching regulator and stop thinking about the problem. PGND is the ground connection over which higher
pulsed currents flow. Depending on the switching regulator topology, this means currents through a power transistor or pulsed currents of a power driver stage – especially relevant in switching controllers with, say, external power switches. AGND, sometimes called SGND (signal ground), is
the ground connection that the other, usually very calm signals use as a reference. This includes the internal voltage reference needed for regulation of the output voltage. Soft-start and enable voltages are also referenced to the AGND connection.
Two approaches There are two different technical approaches and, thus, two different opinions among experts regarding the handling of these two ground connections. According to one approach, the AGND and PGND
connections on a switching regulator IC should be connected right next to the respective pins, which keeps the voltage offset between the two pins relatively low. Thus, the switching regulator IC can be protected from disturbances and, even, destruction. All of the circuit’s ground connections and a possible
ground plane would be linked to this common point in a star topology. Figure 1 shows an example implementing this approach. The board layout for an LTM4600 is shown, a 10A step-down micromodule. The separate ground connections on the board are joined right next to each other (blue oval in Figure 1). Due to the parasitic inductance of the respective bonding wires between silicon and the housing, as well
14 November/December 2020
www.electronicsworld.com
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