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FEATURE AUTOMOTIVE ELECTRONICS


LEARNING IN THE FAST LANE


Jeff VanWashenova, director, automotive segment marketing at CEVAinvestigates the options for building efficient deep-learning networks for autonomous vehicles


V


ehicle makers are implementing increasingly advanced driver


assistance systems (ADAS), such as lane-departure warning, autonomous braking and parking assistance, as they race towards being able to offer fully autonomous driving. Many of today’s ADAS use machine-


vision strategies, implemented using conventional signal-processing techniques, to detect, identify and classify objects. Now developers are exploring the use of deep-learning neural networks to achieve faster and better scene and object recognition. This is a computationally onerous task,


so while today’s developers are using established computing architectures to explore deep-learning neural networks, their widespread adoption in vehicles will demand optimised computing architectures.


TRAINING, TRANSLATION AND IMPLEMENTATION Many of the new vision analysis systems use convolutional neural networks (CNNs). First, a generic CNN is ‘trained’ to achieve the desired image-processing result, such as recognising objects, by exposing it to images that have been tagged with identifiers for each type of object in the scene: trees, pedestrians, road signs and so on. The resultant network, whose weights have been established during this phase, is translated to run on the computing resources available in the target system. Once the network has been optimised in this way, the target system can use the CNN to draw inferences about the scene which it is viewing. Training is often done offline on large


server farms equipped with standard CPUs, GPUs, or even FPGAs. Once the network is achieving the required recognition performance, the conventional next step is to run the network in the target system on CPUs, GPUs or FPGAs like those used during training, typically using floating-point arithmetic to ensure high precision. This may help get to market quickly,


10 MARCH 2018 | ELECTRONICS


optimisations, makes it suitable for running using CEVA’s embedded AI inference processors. CDNN supports the most advanced


neural networks layers and topologies. Also, since AI technology is continuing to evolve, companies are trying to add their own ‘secrete sauce’ for differentiation. As a result, a flexible solution is a mandatory requirement. CDNN was developed as an adaptive solution to cope with future trends. Recently CEVA announced the NeuPro


family, which includes four self- contained, specialised AI processors that are complementary with CDNN. NeuPro consists of a NeuPro Engine,


but it is not the best way to build systems for use in high-volume end applications such as vehicles, where cost and power budget constraints make other approaches a better choice.


TARGETED TRANSLATION AND OPTIMISED COMPUTATION CEVA has developed an alternative approach that does away with the need to use floating-point arithmetic in the target, enabling real-time performance at a power level that is more acceptable for automotive use. It uses a combination of an advanced translation mechanism and an optimised target architecture to enable users to build more efficient CNN implementations. The CDNN (CEVA Deep Neural Network)


software framework automatically converts the floating-point trained network into a fixed-point network and, with additional sophisticated


Figure 1:


CDNN software framework optimises the PC-trained network to run efficiently on CEVA- XM and NeuPro AI Processors


Figure 2: NeuPro AI Processor


which has specialised engines for matrix multiplication, fully connected, activation and pooling layers, and a NeuPro VPU, a fully programmable vector processor unit that can be used to support future development, as well as running the CDNN real-time software framework. The AI processor family supports 8bit or 16bit fixed-point representations to enable overall high accuracy performance. NeuPro support up to 4K 8x8 MACs,


scaling in performance for a broad range of end markets. Ranging from 2 TOPS for the entry-level processor up to 12.5 TOPS for the advanced configuration, it is designed to handle the complete gamut of deep neural network workloads on-device and to cope with future needs. Machine-learning neural networks are


Figure 3:


NeuPro AI processor includes NeuPro Engine and NeuPro VPU


developing rapidly, enabling systems that, in some cases, are better at recognising objects than people are. Although this approach is enabling exciting new capabilities, as always in IC design, it’s vital to make good trade-offs between power and performance. CEVA’s AI processors, together with the CDNN software framework, will help to bring these techniques to a wide variety of embedded applications quickly.


CEVA www.ceva-dsp.com e: sales@ceva-dsp.com


/ ELECTRONICS

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