Signal conditioning
Figure 5. Updated TIA design using a tee network with Cf targeted at 1.2pF.
5. Use this new Rf value and the no tee P1 location to solve for an increased Cf = 1/2π × Rf × P1
An alternate approach would be to target a
specific Cf value, then proceed to set the other elements in the design. That approach will yield a quadratic solution for At.
Here, this new TIA response shape is overlaid on the original no tee design in Figure 6, showing almost no change in the simulated small signal frequency response. Both start out at 86dBΩ gain (20 × log(20kΩ)), with a bit of ripple
and the Vout tee network riding a little higher but both
Using the original no tee P1 location, targeting a particular Cf will solve for the required Rf value to get that same P1 location in the eventual tee network solution. Also constrain
R1 + R2 = 1kΩ = Rl. With a new Rf resolved, the quadratic solution for At needs these standard
elements in the quadratic formula.
-b/2 = (Zt – Rl)/2Rf c = -Rl/Rf
For the previous example design, target
a feedback Cf of 1.2pF. This will be 0.2pF parasitic in the feedback resistor and a 1pF
external Cf. Holding the target P1 at 19MHz requires Rf to go down to 6.97kΩ.
From there, solving the quadratic will give At = 2.78 where R2 = 640Ω and R1 = 360Ω will
deliver that Zt = 20kΩ with Rl = 1kΩ. Changing the example TIA design in LTspice to these conditions gives the circuit of Figure 5.
Instrumentation Monthly March 2026
hitting 33.7MHz F-3dB. It is commonly thought that a tee network will significantly increase the integrated output noise. That assessment depends strongly on the anticipated noise integration bandwidth. Briefly looking at the simulated output integrated noise through 20MHz shows a very slight increase from 330µV rms for the simple 20kΩ feedback of the Figure 1 design to 363µV rms for the tee network of Figure 5. By far the
Figure 6. Simple TIA vs. an equivalent tee network design.
dominant contributor in both is the relatively high input current noise term of 3.5pA/√Hz times the 20kΩ gain to the output. The gain for input current noise does not change when going to the tee network approach from the equivalent single resistor design. It is often useful to target a TIA bandwidth beyond the desired channel bandwidth and constrain the noise integration bandwidth to something lower with a post-filter.
CONCLUSION
A simplified design flow to apply a tee network to a TIA design has been shown here to raise the required compensation capacitor above parasitic levels.
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