Signal conditioning O


ptical sensing requirements seem to be everywhere and growing fast. Extant literature approaches the design solutions from


multiple directions, where a relatively simple, approximate design solution will be applied here. Figure 1 shows the basic photodiode transimpedance amplifier (TIA) design problem with the key elements identified using the 1.3GHz gain bandwidth product (GBP) LT6200-10 decompensated voltage feedback amplifier (VFA). This is showing a specific example using a 10pF detector diode (under its intended reverse bias voltage, not shown in Figure 1) targeting a closed-loop second-order Butterworth frequency response for a 20kΩ desired gain from the input current to the output voltage. But first, a few important points.


1. This bipolar input device has a relatively high input bias current coming out of the input pins when operated close to the negative supply. Rail-to-rail input stages (like the LT6200-10) have a crossover close to the positive supply where a different input stage is activated. For TIA designs, the input pins are normally biased toward the negative rail and do not move in a common-mode (CM) sense. There, the PNP input stage shows a typical 18µA bias current coming out of the pins for the online SPICE


model. The Rbal resistor will cancel the output DC error due to this bias current down to an


Ioffset × Rf term, and Cfil is added to attenuate the Johnson noise from Rbal. This nominal 18µA input bias current through Rbal = 20kΩ will shift the V+ node (and input pins) positive by


0.36V, which will also add to the photodiode bias voltage. The specified maximum 4µA input offset current will add 4µA × 20kΩ = ±80mV to the output DC error band in this example.


2. This starting point is a balanced bipolar supply, so the initial tests are supply centred at ground. Normally, diode detectors are unipolar output current (shown sinking in Figure 1), and the circuit will bias the input and output to swing from some minimum voltage level unipolar positive. A single supply modification to Figure 1 will be considered later.


3. It is important to add the parasitic input


Ccm + Cdiff to the diode source capacitance for compensation analysis (setting Cf). Testing the LTC6200-10 LTspice model showed Ccm = 3.6pF and Cdiff = 0.7pF so for design add 4.3pF to the source 10pF in this example and


use this total Cs = Cdiode+ Ccm+ Cdiff in the design equations. (The data sheet shows


higher values, but for this work, the simulation model elements need to be used.)


Figure 2. Typical TIA


LG curve for the simple single feedback Rf case.


Figure 1. Starting point for a bipolar supply transimpedance amplifier stage.


APPLYING TEE NETWORKS TO EXTEND THE SOLUTION RANGE FOR PHOTODIODE TRANSIMPEDANCE AMPLIFIER (TIA) REQUIREMENTS: COMPENSATION FLOW


By Michael Steffes, staff systems/applications engineer, Analog Devices


As the required solutions for transimpedance amplifiers (TIAs) continue to push up in gain and speed, the demands on those first-stage op amps and the external elements ask for very high gain bandwidth products (GBPs) and impossibly low feedback capacitors. Here we develop a very simple four-step compensation flow delivering an approximate closed-loop Butterworth response for the simple TIA design. That design will then be modified by adding a feedback resistive tee, along with the simple equations required and implementation benefits.


58


March 2026 Instrumentation Monthly


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