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high-performance computing


Carbon nanotube transistors open up to innovative scales


Adrian Giordani investigates the increasing use of carbon nanotubes to produce next-generation


semi-conductor technologies T


he path towards building faster computing systems relies on increasingly smaller transistors to meet the growing demand for more


computational power. Beyond modifying materials and geometries, some researchers are looking to carbon nanotubes as the next step beyond silicon’s miniaturisation barrier. Current silicon-based chips use


complementary metal oxide semiconductor (CMOS) technology. Intel predicts that scaling down silicon-based CMOS will be unsustainable for the industry at seven nanometres sometime aſter 2020. Near the start of 2018 Intel plans to launch its first 10-nanometre product – providing it does not delay its launch as it did in 2015. Tis is a sign that predictably doubling transistor density in conventional chips is becoming increasingly difficult. In the west, Intel, IBM


10 SCIENTIFIC COMPUTING WORLD


and others are investing billions in novel chip R&D technologies, achieving small, iterative progress. Tis structure of carbon in a hexagonal


lattice shape can be thought of as a sheet of graphene rolled into a cylinder. Te simplistic structure and key properties of graphene could herald a new age of transistor development – below seven nanometres. With conventional silicon transistors


TRADITIONALLY THE PROBLEM IN CARBON HAS BEEN THAT IT IS DIFFICULT TO MAKE GOOD TRANSPARENT CONTACTS TO TYPICAL METAL


struggling to keep up, carbon nanotube- based transistors could provide a significant increase in computational performance.


Breaking the 10nm barrier In the East, the reality of fabricating transistor prototypes that are smaller, more energy- efficient and less prone to overheat and fail just went up a gear. In January 2017, Chinese researchers from Peking University published in the journal Science their breakthrough in developing a carbon nanotube field-effect transistor (CNT FET) of just five nanometres in size; the first time this technology has reliably been scaled down under 10 nanometres, according to the research paper. Tis, and similar innovations, will help


the jump to better computing for big data projects, cybersecurity, atomic clocks and communication networks, to name a few areas. Tis transistor is faster and operates at a


much lower supply voltage – 0.4 volts instead of 0.7 volts – compared with a silicon-based CMOS transistor of the same scale. ‘Previously, IBM fabricated a nine


nanometre p-type [channel category for @scwmagazine l www.scientific-computing.com


Mopic/Shutterstock.com


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