programmable gate arrays (FPGAs). In the future, some of the POL converters may be powered directly from the 48V DC bus – more of this later. If the total efficiency of the power distribution network is 80–90%, then more than 10% of the power supplied by the utility (and paid for by the data-centre owner) is dissipated as heat by these power modules. This unwanted heat must be removed to ensure that the environment remains at a stable temperature within the specified operating range, which is chosen to ensure adequate system reliability. For many data centres this is 20–22°C, which is usually maintained by air-conditioning, sometimes assisted by extra chillers. Another approach taken by some operators is to choose locations in cold, northern climates when building new data centres, so that the cooler outdoor ambient air can be used for cooling at a lower cost. Considering the combined cost of power-converter losses and the power to run the cooling system, a significant reduction in the utility bill could be achieved if the overall power supply efficiency could be improved by just a few points. If all data centres worldwide were to increase efficiency by just 1%, electricity savings alone would equal nearly one billion euros.


The Transition to Digital Power Conventional switched-mode power converters tend to reach a peak of efficiency just below their maximum load. The efficiency is slightly reduced closer to maximum load, but is significantly reduced at lower loads. These variations occur because the power supply’s behaviour is determined by components such as capacitors of fixed value. These are chosen to ensure that the feedback remains stable across a wide range of operating conditions, but cannot ensure uniform efficiency across the load range. The advent of digital power now offers a solution to


overcome this limitation. Unlike conventional analogue power supplies, digital power supply characteristics are determined by firmware. The values of the registers that govern the operating parameters can be changed more quickly and easily compared to using components such as capacitors that have fixed values. Early adopters of digital power have taken advantage of its enhanced flexibility to streamline testing and set-up, and to leverage economies of scale by creating platform power supplies that can be configured for a variety of applications or different end-user requirements or operating conditions, simply by loading different configuration files. Digital


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Figure 2. Digital power modules controlled by instructions delivered across PMBus connection,


power functionalities can also help designers deal with the complexity of modern power distribution, such as the large number of different voltage rails required for multicore processors or FPGAs, and can respond to changes in line and load conditions as network traffic demand fluctuates. Digital power modules are usually adjusted by a central controller, which communicates with the module over a power management bus (PMBus) connection as illustrated in Figure 2. PMBus is an industry standard developed from the system management bus (SMBus) specification, and defines a physical connection and protocol for exchanging data between power modules. In addition, digital power supplies can be stabilized using fewer on-board capacitors, which enables smaller power modules thereby liberating extra board real estate to host greater processing power and hence offer more, faster, and better services for end users.


The Next Step: Software-Defined Power Software-defined power introduces real-time adaptability to digital power supplies. In a software-defined power architecture (SDPA), a software application hosted on the central controller takes over, adjusting the power supply in real time in response to changes in load. It can also compensate for the effects of slower variations, such as component ageing. Functionalities made possible by SDPA include dynamic bus voltage (DBV) adjustment, which optimizes bus voltages as load conditions change, and adaptive voltage scaling (AVS) that responds to changes in the workload of individual processors to minimize power consumption.


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