31 V which is < 10% of the peak voltage of a rectified 240 Vac input.
One topology for high PF boost converters is fixed on time control where the switching cycle restarts when the current through the inductor reaches zero. To control the power delivery, feedback is used to adjust the on time. The same principle can be adapted to implement a buck
power factors of greater than 0.9 can be achieved with reduced losses in the switch and inductor which helps to achieve higher conversion efficiency and limit the size of the inductor. This creates a typical line current waveform which doesn’t look very sinusoidal. However this waveform can have a PF > 0.9 even with the trade-off of increased distortion. To implement this hybrid fixed on time/peak current topology the NCL30002 controller from ON
Semiconductor has been developed and Figure 1 illustrates the basic application schematic.
The first point in reviewing the Figure 3: Hi-PF buck performance with 18.8 W output (25 V@750 mA)
topology and can be improved with a twist. One characteristic of the fixed on time is that the current through the inductor and switch rise in proportion to the line, this results in near perfect power factor with the trade-off that the peak current can be very high at the top of the switching cycle. In the bulb case, ideal power factor is not required so if the peak current is limited during a portion of the switching cycle,
schematic is that the LEDs are referenced to the high voltage rail while the power switch is referenced to ground. This is referred to as a reverse or “inverted” buck and simplifies the architecture since the peak current through the inductor and LEDs can be sensed directly and to drive the FET, a level shifter is not
required. After the controller starts switching, the driver is biased from an auxiliary winding on the inductor, this actually has two functions as it is also used to sense when the current through the inductor drops to zero indicating a new switching cycle should start. A precise 485 mV (± 2% typical) is used to accurately regulate the peak current through the switch. After Vin exceeds LED load Vf, fixed on time control is used to regulate
the power to the LEDs until the peak current limit is reached which is detected by Rsense. To control the delivered power if the AC line varies from nominal, line feed forward compensation is used vary the on time. During the design procedure, the amount of time that the controller is operating in fixed on time versus peak current regulation can be varied to trade-off current regulation accuracy, overall efficiency, PF, and inductor size.
An example design was implemented for an 18 W nominal output power driver suitable to be incorporated inside an LED replacement for a 75 W A-lamp based on driving 8 LEDs in series at 750 mA with nominal output ripple of < ± 30%. Figure 2 is a picture of this board which had a width of 18 mm and a length of 60 mm. Typical efficiency was 89.5% and measured power factor was 0.935 at 240 Vac as seen in Figure 3. As illustrated with an optimised architecture, it is possible to solve the challenging puzzle of achieving high power in a compact form factor while meeting the Energy Saving Trust long term objective of > 0.9 for integral LED bulbs. Efficiency can be further improved over >90% at the same power level with higher forward voltage LED strings at lower drive current. As a controller based architecture, the basic design approach can be scaled downward for lower power applications by changing the MOSFET and reducing the size of the inductor. This is critical since LED efficacy will continue to advance for the foreseeable future as manufacturers increase lumen output per LED, requiring fewer LEDs for the same lumen output and thus pushing down the energy consumption while at the same time reducing the cost of integral bulbs and increasing their market acceptance.
ON Semiconductor |
www.onsemi.com
Bernie Weir is LED Applications Manager, AC/DC Group and Frazier Pruett, Applications Engineer at ON Semiconductor
April 2012 CIE Power Supplement
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