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Test & Measurement


Figure 3: Test coverage block diagram


and structural tests in the absence of firmware.


At-speed functional testing Since PCT operates through the processor’s debug port, it must follow boundary-scan testing which has verified the functionality of the debug port. With PCT, the board bring-up engineer is able to step through the design in an interactive fashion, testing and initializing devices connected to the processor and interpreting the results of these operations.


The characteristics of the design, the actual CPU deployed on the board and other factors will determine the specific steps PCT will follow, but essentially the bring-up team will access device models from the tool’s library, adjust these models if needed, and then begin to interactively initialize at CPU speeds the devices radiating outward from the processor. If a device will not initialize, PCT provides diagnostic capabilities to determine why.


What about validating bus performance? At this point in the board bring-up team process, the team has made considerable progress bringing up the hardware without any firmware or operating software. Boundary-scan tests have discovered structural faults like shorts and opens, and PCT has tested the functionality of devices linked to the processor and provided additional at-speed test coverage. Next, the design team will want to know whether the high-speed input/output (I/O) and memory buses are performing at the speeds required by the design spec. If they aren’t, the functionality of the entire sub-system could be in jeopardy.


Another non-intrusive tool could be deployed at this point to validate signal integrity. Because many of today’s high- speed serial buses are very sensitive to capacitive coupling effects, placing a probe on a bus will only introduce anomalies into the signals rather than validate signal integrity. To avoid this shortcoming, many chip suppliers such as Intel, PLX Technologies, Avago and others are embedding instruments into their devices. These embedded instruments can be employed to validate the actual signal integrity at the receivers. For example, Intel Interconnect Built-In Self Test (IBIST) is this


www.cieonline.co.uk


company’s embedded instrument technology for high-speed buses. In addition to validating signal integrity without placing a probe on a bus, embedded instrumentation like IBIST can detect manufacturing and process variances like solder voids, micro-cracks, head-in-pillow defects and other such issues. (Figure 2 – IBIST eye diagram) The cumulative diagnostic, test and validation coverage generated by these non-intrusive tools (Figure 3 – Test coverage block diagram) is quite impressive. This type of comprehensive coverage can be put to good use by board bring-up teams that are under tremendous pressure and often are dealing with boards bereft of functional firmware and software.


The bottom line


One of the most important aspects of a non-intrusive board bring-up toolset is the cost savings it will generate. With it, the designers charged with board bring-up are not forced to depend upon expensive legacy test equipment with costs that continue to rise while validation, test and debug coverage falls. For example, signal integrity validation based on non-intrusive embedded instruments eliminates the need for expensive probe-based oscilloscopes that only distort signals and, as a consequence, must extrapolate or simulate bus signalling. And the expensive test fixtures required by ICT and MDA systems can also be reduced or eliminated. Another source of cost savings occurs when the manufacturer migrates the non- intrusive tests from board bring-up to manufacturing, eliminating the re- development costs for a manufacturing test suite. It’s already available because it’s been used by design to bring up the prototypes.


And, detecting problems earlier in the


prototype lifecycle with better tools can result in higher-quality products getting to market faster, which can positively impact companies’ bottom lines. And, of course, there is the reduction of


stress on the engineers on the board bring-up team. That in itself is priceless.


ASSET Intertech | www.asset-intertech.com


Reg Waller is the European Director of ASSET InterTech


Components in Electronics April 2012 11


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