Power Management
Overturning tradition L
Benjamin Jackson examines the power density and performance improvements seen in new automotive power semiconductor packages
ast year Ford Motor Company announced that by 2012 it was targeting to have up to 90% of the vehicles it produced equipped with Electric Power Steering. Ford cited the improved performance and a possible 5% fuel economy as driving factors for this rapid adoption. Steadily but surely automobile manufacturers are looking to design out the engine-driven auxiliary loads such as fuel, water, brake and power steering pumps with electric driven ones. Improved fuel efficiency, reliability and reduced CO2 emissions are the main drivers but the dominance of the existing technology remains strong.
Power density is a phrase often used in describing servers, but less often associated with cars, but it is indeed important; the vehicle needs to be a finite size and increasingly to meet emissions and fuel consumption regulations limits are put on weight. A typical lead acid battery has an energy density of around 0.1MJ/kg compared with around 45MJ/kg for gasoline; this is one reason why advanced battery technology is needed to make hybrid and electric vehicles a practical reality – the traditional technology offers great energy density. Similarly the existing engine and hydraulic driven pumps on a car offer very good power density compared with a typical electrical motor, so replacing these traditional solutions with electric drives requires advanced motor design and highly efficient and compact power electronics.
No semiconductor today is an ‘ideal’ switch with an infinitely low on resistance so heating occurs. How this energy is managed and extracted from the switch, greatly affects power density. Consider thermal resistances and electrical resistances to be alike, temperature difference like electrical potential difference and power transfer the equivalent of current flow. Thus the power dissipation in the steady state of a semiconductor can be expressed as:
to be made, taking: Equation (2)
Substituting 1 and 2 together we arrive at:
Equation (3)
Finally dividing by the area of the MOSFET’s PCB footprint we can arrive at the current density of a particular switch:
Figure 2: Comparison of Die Free Package Resistance (DFPR) for different semiconductor power packages
5; the package area is five times the size of the largest die size. Large Can DirectFET however offers a ratio of about 1.7 – so ultimately on the PCB you can achieve a given RDS(on) in a smaller space.
Equation (4)
Using equation 4 we can see how to increase current density and compare and contrast how different power semiconductor packages maximise this metric. Essentially there are three routes to getting good current power density in MOSFETs:
1. Minimal junction heating through using the lowest possible RDS(on) 2. Extract the heat as efficiently as possible 3. Make the MOSFET as small as possible without sacrificing 1 and 2
Keeping it small
Ultimately the smaller the footprint of the MOSFET the greater the power density, however such a reduction in package footprint area must not be done at the expense of RDS(on) or
current carrying ability. Ultimately the designer wants to get the lowest RDS(on) possible in a given space. As die size and RDS(on) are inversely proportional, calculating the ratio of package footprint area to maximum die size area for the given package is an indication of the RDS(on) performance that a given package can offer in a given space. Figure 1 plots the ratio of package footprint to maximum die size area.
In Figure 1, the ideal ratio would tend towards 1, giving the least mm2 of PCB footprint for a given RDS(on). However Figure 1 clearly shows the area overhead that the more traditional packages such as the DPak and D2Pak place on the die size area, and ultimately the reduction in current density. The D2Pak has a package footprint to maximum die size area of
The technology and basic design of the D2Pak and DPak have changed little over the years, the leadframe, wirebonds and molding take up area and volume while at the same time impeding performance; they are an increasingly bothersome overhead as semiconductor technology improves. The latest power packages like the 5x6 PQFN fit far more silicon in a given space and in the case of Automotive DirectFET 2, the lead frame, wirebonding and molding are eliminated all together leading to further performance and reliability improvements.
Limiting heating Equation (1)
Where Pd is the power dissipated in the semiconductor switch, Tj is the junction temperature, TA the ambient temperature and RthJA is the total thermal resistance from junction to ambient.
Linking power dissipation to current through the MOSFET allows a current density comparison between packages
28 July/August 2010 Figure 1: Package footprint to maximum die size area Components in Electronics
There have been dramatic advances in semiconductor technology over the years to achieve the lowest possible RDS(on) for a given area of silicon. Now with the very best trench technology and smallest geometries semiconductor designers are coming close to the fundamental performance limits of silicon, so not surprisingly new substrates like Silicon Carbide and Gallium Nitride are becoming popular as they can offer up to 10 times lower RDS(on) per area than a silicon based technology. But before getting absorbed in new materials it’s important to realise that there is still room for improvement on the packaging which will house the semiconductor, regardless of whether it’s a silicon or silicon carbide switch. MOSFETs with an on resistance of around
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