HIGH PERFORMANCE COMPUTING
The path to exascale
ROBERT ROE REPORTS ON THE POTENTIALLY FAR- REACHING BENEFITS OF EXASCALE COMPUTING FOR EUROPEAN RESEARCH
As the HPC industry prepares for the next milestone in supercomputing, there is much
work to be done preparing hardware and software to meet the challenge of reaching exascale computing. Beyond this milestone, exascale
computing could provide far-reaching benefits such as new computing architectures, more robust programming models and software that can scale beyond today’s largest supercomputers. Both the European and the US exascale
efforts focus on the use of co-design to reach this milestone and, while this does make development more complex, it also means that software and hardware designers work closely to ensure that future designs work in harmony. John Goodacre, professor of computer
architectures at the University of Manchester, commented on the co- design process and what the EuroEXA project hopes to achieve using this approach. ‘The biggest challenge with co-design in any project is working with the differences in development schedules between hardware and software,’ said Goodacre. The EuroExa project represents the culmination of several EU-funded research projects, ExaNoDe, ExaNeSt, EcoScale and EuroServer that have laid the ground-work for the design of an exascale computing architecture based on Arm processors and FPGA acceleration. The project also includes advanced memory technologies, immersion cooling and debugging, and tools from Allinea. The project is using this co-design
approach to build a balanced architecture for compute and data-intensive
8 Scientific Computing World October/November 2017
applications. It uses cost-efficient, modular-integration enabled by novel inter-die links using a novel processing unit with integration of FPGA for data-flow acceleration. The team also hopes to provide a homogenised software platform that delivers heterogeneous acceleration with
”It is hoped that the legacy is not just a milestone on the way to exascale”
scalable shared memory access and a unique hybrid geographically-addressed, switching and topology interconnect within the rack. As the architecture for the EuroExa
project has been fixed around the use of CPU/FPGA, Goodacre commented that much of the co-design work focuses on balancing resources and ensuring software is ready to make use of this new architecture. ‘Previous collaborations to EuroExa
have looked from a hardware perspective at applications at the kernel/miniapp level,
and at system level – so the EuroEXA co-design is about sizing and balancing the resources, rather than changing the overall architecture – that holistically evolved along with the apps in the previous years,’ said Goodacre. ‘The way we therefore coordinate this in EuroExa, is to have two pillars to the project, with the application pillar providing early visibility to the required resource balance, and the technology pillar negotiating what is possible in the constraints of technology, budget and schedule.’ Ultimately, the goals for exascale
computing projects are focused on delivering and supporting an exascale- class supercomputer, but the benefits have the potential to drive future developments far beyond the small number of potential exascale systems. Projects such as EuroExa and the Exascale Computing Project in the US could have far-reaching benefits for smaller-scale HPC systems. As Goodacre notes, while the goal of
the project is to provide the design for a future exascale system, the team behind the project hopes to deliver a much more significant legacy for future HPC users.
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