HIGH PERFORMANCE COMPUTING
Arm aims to diversify HPC market
Robert Roe reports from the Arm Research Summit
This year’s Arm Research Summit not only showcased research and development but also hosted HPC specialists and the company’s ecosystem partners. The event, held in
September, was the second annual event held to showcase the research and development of the Arm ecosystem. Held at Robinson College, Cambridge, over two days, it demonstrated the wide variety of applications that can now be run on Arm systems, and also featured advances in the architecture and performance driven by new research into the Arm computing ecosystem. The talks were split into
parallel sessions that covered topics from architecture and memory to machine learning,
HPC, computer vision and future developments beyond Moore’s Law. The talks featured both those working to develop the performance of the Arm computing architecture and those conducting research using Arm computing systems. The programme featured an update on the SpiNNaker project from Manchester University professor and creator of the BBC Micro and the Arm 32-bit RISC microprocessor – Steve Furber.
SpiNNaker (Spiking Neural
Network Architecture) is a manycore computer architecture designed by the Advanced Processor Technologies Research Group (APT) at the School of Computer Science, University of Manchester, to simulate the human brain. The project aims to harness
”The talk I gave highlights the realisation that this Decoupled Access-Execute ties very well with accelerators”
a million Arm processors in a massively parallel computing platform based on spiking neural networks. A series of workshops
on day one were aimed at a more in-depth look at topics from computer-system architecture research and the use of gem5 and SoC design, to more application-based topics including the GoingArm Workshop and another session that focused on collaborative research projects. One of the presentations
delivered on the first day of the conference came from Stefanos Kaxiras, of Uppsala University, who gave a presentation on the development of the Arm architecture called ‘DAEFINITION: Decoupled Access-Execute Compilation for Accelerated Architectures’ In an interview with Scientific Computing World, Kaxiras explained that this research is focused on increasing the energy efficiency of computation by separating memory bound and CPU code into different phases that can be optimised independently. ‘The idea is that you take
away the junk code, the loads, the control flow, all the difficult code that contains much of the latency of going to memory, fetching data from memory and doing all that stuff,’ explained Kaxiras. ‘You put all the bad things
Robinson College, in Cambridge, was the venue for the two-day summit
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12 Scientific Computing World October/November 2017
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