Feature: System security Secure Memory Encryption (SME) is based on 128-bit AES
keys that are activated via the BIOS settings; see Figure 1. If SME is enabled, the memory controller automatically encodes all contents stored in the memory via an AES-128 key assigned by the co-processor. Tis effectively protects the data in the working memory and cache from cold-start or platform-reset attacks – threats that occur at the edge. Te AMD Secure Processor also generates the AES keys for the
Secure Encrypted Virtualisation (SEV), which allows each virtual machine (VM) running the EPYC CPUs be encrypted with its own unique key, known only to the processor the VM is running on; see Figure 2. Even if a VM has been compromised, the attacker can’t access the contents of the other VMs – and neither can the hardware-isolated key manager. By activating an additional module, second-generation AMD
EPYC processors from the 7002 Series can also encrypt the register that the hypervisor assigns to a VM. Tis feature, which AMD calls SEV Encrypted State (SEV-ES), uses a so-called Guest Hypervisor Communication Block (GHCB), to prevent CPU register data from being visible to other soſtware components, including the hypervisor; see Figure 3. So, even if the hypervisor itself is compromised, it can’t access the memory contents of the VM because the GHCB only supplies encrypted contents in response to requests. AMD SME is a default setting, but AMD SEV and SEV-ES require activation in the guest operating system and hypervisor;
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however, no change is necessary in the actual applications. So, if the hypervisor and OS support SEV, the customer application can take full advantage of these security features.
Choice of series AMD provides a choice of three embedded EPYC series to design secure edge server applications, covering a gamut of performance requirements and applications. Te latest family members – the EPYC Embedded 7002 Series – are available in nine different performance classes. Tey range from the octa-core 7262 device with a maximum clock speed of 3.4GHz and a thermal design power (TDP) of 155W, to the 7662 processor with 64 Zen 2 cores, 3.3GHz clock speed and TDP to 240W. All 7002 SoCs provide no fewer than 128 PCIe Gen-4 lanes and 32 SATA Gen-3 ports, in addition to 4x USB 3.1 Gen 1 and low-speed interfaces such as GPIO, I2C, LPC, SMBus, SPI and UART. Te EPYC Embedded 7001 Series processors also start from
eight cores and go to 32 cores in the 7601 device. Tey, too, offer similar features, with their TDP ranging from 120W to 180W; their cooling demands are, however, much lower compared to those of the 7002 Series. When it comes to extremely harsh environments or temperature
ranges anywhere from -40°C to 85°C, the EPYC Embedded 3000 processors meet these demands: With up to 16 Zen cores and flexible I/Os, they offer a highly-suitable combination of performance and resilience for embedded designs.
www.electronicsworld.co.uk September 2022 19
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