Column: JESD204 standard
Comparing JESD204B and serial LVDS interfaces in wideband applications
By George Diniz, Product Line Manager, Analog Devices
T
he JESD204A/JESD204B industry standard for serial interfaces was developed to address the problem of interconnecting the latest wideband data converters
with other system ICs in an efficient and cost-saving way. Te motivation was to standardise an interface that would reduce the number of digital inputs/outputs between data converters and other devices, such as field programmable gate arrays (FGPAs) and system-on-a-chip (SoC) devices, with a scaleable high-speed serial interface. Trends show that new applications – as
well as advances in existing ones – are driving the need for wideband data converters with increasingly higher sampling frequencies and data resolution. Transmitting data to and from these wideband converters poses a significant design problem, since bandwidth limitations of existing I/O technologies require higher pin counts on converters. Consequently, system PCB designs have become increasingly complex in terms of interconnect density. Te challenge is routing a large number of high-speed digital signals whilst managing electrical noise. Te
14 March 2021
www.electronicsworld.co.uk
Table 1: Comparing serial LVDS and JESD204 specifications
ability to offer wideband data converters with GSPS sampling frequencies with fewer interconnects, simplifies the PCB layout challenges and allows for more compact systems without affecting performance. Market forces continue to press for more
features, functionality, performance and higher data-handling capacity in a given system. Te high-speed analogue-to-digital converter (ADC) and digital-to-analogue converter (DAC) to FPGA interface had become a limiting factor in data-intensive applications. Te JESD204B serial interface specification was specifically created to help solve this problem by addressing this critical data link. Figure 1 shows typical high-speed converter-to-FPGA interconnect configurations using JESD204A/JESD204B.
Need for JESD204B Tere are some applications that drive the need for the JESD204B standard, including:
• Wireless infrastructure transceivers OFDM-based technologies, such as LTE, used in today’s wireless infrastructure transceivers, use DSP blocks implemented on FPGAs or SoC devices driving antenna array elements to generate beams for each subscriber handset. Each array element may move hundreds of megabytes of data per second between FPGAs and data converters in both transmit and receive mode. • Soſtware-defined radios (SDR) Today’s SDRs utilise advanced modulation schemes that can be reconfigured on the fly, with rapidly increasing channel bandwidths to deliver unprecedented wireless data rates.
Efficient, low-power, low-pin-count FPGA-to- data converter interfaces in the antenna path play a critical role in their performance. SDR architectures are integral to the transceiver infrastructure for multicarrier, multimode wireless networks supporting GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX and TD-SCDMA. • Medical imaging systems Medical imaging systems including ultrasound, computational tomography (CT) scanners, magnetic resonance imaging (MRI) and others generate many channels of data that flow through a data converter to FPGAs or DSPs. An increasing number of I/O counts is driving the number of components by requiring interposers to match FPGA and converter pinouts and, also, increase PCB complexity and costs. Te JESD204B interface is much more efficient. • Radar and secure communications Te increasingly-sophisticated pulse structures of today’s advanced radar receivers are pushing signal bandwidths toward 1GHz and beyond. Latest-generation active electronically-scaled array (AESA) radar systems may have thousands of elements. High-bandwidth SERDES-based serial interfaces are needed to connect the array element data converters to the FPGAs or DSPs that process incoming data streams and generate outgoing ones.
Serial LVDS or JESD204B? To choose the best product for the application, a comparison of features and capabilities of LVDS and the various versions of the JESD204 serial interface is shown in Table 1.
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