Frequency & Microwave
Simplify and improve the performance of ultrasonic medical imaging systems using a multi-channel digital demodulator and the JESD204B interface
Hugh Yu, Gina Kelso, and Ashraf Saad from Analog Devices, Inc., introduces a design based on digital demodulator and JESD204B interface for multiple channel ultrasound receive systems
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ltrasonic imaging systems designers must continuously struggle to meet the demand for ever-higher image quality being made by users throughout the medical diagnostics field. One of the key techniques for image quality improvement is to enhance the signal-to-noise ratio of the receiving channel. As the number of receiving channels in a system doubles, the signal-to-noise ratio should improve by 3 dB in theory. Therefore, increasing the number of system channels has become the easiest and most effective method to strengthen the signal-to-noise ratio. At present, 128-channel has successfully become the mainstream configuration for middle to high level medical ultrasound equipment, and 192 or more channels will become the next trend for premium systems. With the increase in number of channels, the data rates between the analog front end (AFE) and back end digital processing section grow proportionally. Higher channel counts also create similar growth in the number of digital circuit device interfaces, the processing power, the costs, and the design complexity of the entire receiver circuit. For example, most ultrasound imaging systems use Radio Frequency (RF) beamforming techniques where the output data rate is entirely determined based on the resolution, sampling rate, and channel numbers of the analog-to-digital converter (ADC). Meanwhile, the Analog Front End (AFE) usually uses Low-Voltage Differential Signalling (LVDS) output interfaces. An octal AFE requires 8 pairs of LVDS data wires plus a pair of data clock and frame clock each. For a system with over 128 channels, there are significant amounts of data and physical connections.
System architecture An ultrasound system is composed of a
probe (transducer), transmitting circuit, receiving circuit, back end digital processing circuit, control circuit, display module, etc. The digital processing module usually comprises a Field Programmable Gate Array (FPGA) which generates the corresponding waveforms according to the current configuration and control parameters of the system, and the transmit circuit's driver and the high-voltage circuit then generate a high voltage to excite the ultrasound transduces. The ultrasound transducer is usually made of Piezoelectric Ceramic Transduce (PZT). It converts a voltage signal into an ultrasound wave that enters into the human body while receiving the echoes produced by the body’s bone and tissue. The incoming echoes are converted into a voltage signal and transmitted to a transmitting/receiving (T/R) switching circuit. The primary objective of the T/R switch circuit is to prevent the high-voltage transmit signal from damaging the low- voltage receive analog front end. The incoming analog voltage signal is amplified and subjected to signal conditioning and filtering before being passed to the AFE’s integrated ADC where it is converted into digital data. The digitised signal is then transmitted through a JESD204B interface to the back end digital parts for the corresponding processing to eventually create the ultrasound image. The receiving channel is composed of a 128 channel T/R switching circuit, 16 octal channel ultrasound AFE elements with a digital demodulator and an FPGA with an JESD204B interface.
AD9671: Octal ultrasound AFE with digital demodulator and JESD204B interface
The AD9671 octal ultrasound AFE with digital Demodulator and JESD204B interface from Analog Devices (ADI), form
Figure 2: AD9671 functional block diagram
the basis of this ultrasound system receiving circuit. It contains eight Variable Gain Amplifier (VGA) channels with a Low Noise Amplifier (LNA), a Continuous Wave (CW) harmonic rejection I/Q demodulator with programmable phase rotation, an Anti- Aliasing Filter (AAF), a 14-bit ADC, a digital demodulator and decimator for data processing and bandwidth reduction, and JESD204B interfaces.
The digital demodulator is composed of a baseband demodulator and baseband decimator. The demodulator down converts the RF signal to a baseband quadrature signal. The excess oversampling is reduced by the decimator.
Digital demodulator application analysis
For a 128 channel ultrasound system, if a 14-bit ADC is utilised with a sampling rate of 40 MSPS, and an RF beamforming algorithm is used, then, the data rates between the ADC output and the beamforming FPGA is 14*40*128 = 71.68 Gbps.
The baseband demodulator of the RF signal performs quadrature demodulation. It can be achieved by multiplying the digitised RF signal outputted by the ADC with a complex sinusoidal signal, where is the demodulation frequency that can be close to the centre frequency of the ultrasound transducer to down-convert the centre frequency to around 0 Hz. The output signal is a complex signal that is represented by its I (In phase) and Q (Quadrature phase). The centre frequency of the probe and all of the interested frequency bands signals are down shifted to approximately 0 Hz, the unwanted frequency components are filtered out with the filters and decimator to retain the band information that is useful to generate the ultrasound images.
JESD204B interface application analysis
Figure 1: 128-channel ultrasound system block diagram
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In terms of current AFE and ADC in multi- channel ultrasound system applications, LVDS has replaced the parallel output interface. However, for the 128-channel or
higher ultrasound system, the large amounts of LVDS wire connections for the ADC output is still a headache for the design engineers. With LVDS, there are 10 pairs of wire for one octal AFE in a current ultrasound system. For a 128-channel ultrasound system, 128/8*10=160 pairs of LVDS data and clock wires are required to be connected to the FPGA.
As the JESD204B uses a 16-bit digital output format and uses 8B/10B encoding, the output data rate for an octal AFE with 14-bit resolution, 40 MSPSADC the sampling rate is 20*40*8=6.4Gbps. The maximum data rate of each lane of the AD9671 JESD204B interface is 5.0 Gbps, so only two pairs of data lane are needed to implement an 8 channel AFE data output. So for a 128-channel ultrasound system, only 128/8*2=32 pairs of output data lanes are required as compared to 160 pairs of the LVDS wires; 80 per cent of the physical interface routing is eliminated.
Conclusion
A multi-channel ultrasound system design based on AD9671, an octal AFE with digital demodulator and JESD204B interface, is introduced in this article. The application advantages and benefits of using such an AFE with digital demodulator and JESD204B interface in an ultrasound system are effectively analysed respectively. Comparing with most of current RF beamforming and LVDS interface based designs, both the data rate and interface routing between the analog front end and digital processing parts are reduced 80 per cent.
If the two methods are combined together in an analysis, the physical connections would be reduced even further. Therefore, the system design presented in this article can effectively simplify the circuit design and software processing complexity by reducing the required board area for data interface routing, the computational complexity requirement, as well as the system design costs.
www.analog.com Components in Electronics June 2017 41
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