Semiconductors
How new silicon architectures improve efficiency without sacrificing robustness
By Ryan Manack, VP of marketing at iDEAL Semiconductor S
ilicon power semiconductors are a mature and well-understood technology; for many years, progress has come primarily through incremental improvements rather than fundamental architectural change. The last major leap at the device architecture level was the introduction of RESURF-based SuperJunction MOSFETs, which enabled higher blocking voltages without the steep resistance penalties of earlier trench-based devices. Since then, continued gains in efficiency have been achieved, but largely through process refinement rather than new structural concepts. As system power levels and switching frequencies increased, designers began exploring wide-bandgap materials to address loss and power-density challenges, often accepting higher cost, increased design complexity, and supply-chain considerations as part of that decision.
More recently, a new silicon device architecture has emerged, reopening this design space. By rethinking how charge balance and conduction area are implemented within a RESURF structure, this approach delivers substantial improvements in efficiency and robustness while preserving the cost, manufacturability, and reliability advantages of silicon. For power designers, this raises an important question: how do these new silicon architectures affect the trade-offs among performance, complexity, and system cost in modern power conversion designs?
A brief history of power devices For as long as silicon has been used, engineers have sought ways to improve the performance of power devices, initially focusing on conduction losses, but as operating frequencies increased, switching losses became equally important.
The first milestone in silicon power devices occurred in the late 1970s with the development of the legacy 1D HexFET MOSFET, later improved with a trench-gate design. The advantage of these devices is that nearly the entire silicon area is dedicated to current conduction, resulting in very low on- resistance at lower voltage ratings. This made HexFET MOSFETs well-suited to low-voltage,
30 April 2026
Figure 1: SuperQ uses atomic-level innovation to deliver a high-performance structure
high-current applications. However, to achieve this conductive structure, engineers had to accept that the resistance would increase with increasing breakdown voltage to the power of 2.5 (BV2.5), making high-voltage implementations increasingly inefficient and impractical for applications requiring both low resistance and high voltage. Two decades later, RESURF-based SuperJunction architectures entered the market. By introducing alternating p- and n-type regions in the drift layer, these devices achieve two-dimensional charge balancing. This allows the blocking voltage to increase while enabling the specific on- resistance to scale approximately linearly with breakdown voltage, representing a significant improvement over earlier 1D structures. A key limitation of SuperJunction devices is that only a portion of the device cross- section actively conducts current, whereas the remainder supports voltage blocking. As a result, conduction efficiency is inherently limited by the symmetrical p- and n-pillar structure, and further improvements require increasingly complex and costly process steps.
SuperQ architectures The more than 25-year gap since the introduction of RESURF devices has led many in the industry to believe that further innovation using silicon is unlikely or even impossible.
Like SuperJunction devices, SuperQ employs a RESURF structure – albeit an asymmetrical one, as shown in Figure 1. This
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asymmetry significantly widens the conductive n-channel area, replacing the SuperJunction p-pillar with a proprietary high-aspect, deep- ratio trench with sidewall charge. Because this trench occupies just up to 5 per cent of the overall width, a wide n-channel (up to 95 per cent of the overall width) is retained for conduction. The result is a substantial increase in efficiency.
The SuperQ architecture supports high electric-field strength in the drift region, enabling voltage blocking on the order of 19–20 V/µm, approximately 50 per cent higher than that of corresponding SuperJunction devices.
Due to atomic-level engineering, SuperQ devices exhibit a significantly lower specific on-resistance (RSP) than the corresponding SuperJunction device, particularly within the 60V–850V range.
As shown in Figure 2, SuperQ, compared Figure 2: In terms of RSP
with leading competitors in the 150V–400V range, offers on-resistance ratings that are 1.6x to 5.7x lower than those of legacy silicon devices.
Beyond static performance, the SuperQ structure also affects dynamic behaviour. Lower drift resistance and reduced charge storage contribute to lower switching losses and lower reverse-recovery energy. These characteristics are especially relevant in applications operating at higher switching frequencies or using hard-commutated topologies, where both conduction and switching losses must be managed simultaneously.
From a design perspective, the
architectural benefits translate into practical system-level advantages. Lower specific on-resistance can reduce the number of parallel MOSFETs required for a given current rating, simplifying layout, current sharing,
, SuperQ easily outperforms the best the market has to offer
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